itanium

What does “a GP/function address pair” mean in IA-64?

由 空扰寡人 提交于 2019-12-10 15:55:47
问题 What does "a GP/function address pair" mean in Itanium C++ ABI? What does GP stand for? 回答1: Short explanation: gp is, for all practical means, a hidden parameter to all functions that comply with the Itanium ABI. It's a kind of this pointer to the global variables the function uses. As far as I know, no mainstream OS does it anymore. GP stands for "globals pointer". It's a base address for data statically allocated by executables, and the Itanium architecture has a register just for it. For

Read and write process' memory through /dev/mem, text segment works but data segment can not, why?

由 允我心安 提交于 2019-12-10 15:15:03
问题 I want to read to and write from process' memory through /dev/mem . First , I get process' memory map through a linux kernel module coded by myself, output is like this: start_code_segment 4000000000000000 end_code_segment 4000000000019c38 start_data_segment 6000000000009c38 end_data_segment 600000000000b21d start_brk 6000000000010000 brk 6000000000034000 start_stack 60000fffffde7b00 Second , I can convert virtual address(VA) to PA thorough the linux kernel module, for example, I can convert

How do I get cx_Oracle to work on 64-bit Itanium Windows?

由 巧了我就是萌 提交于 2019-12-07 12:58:06
问题 I'm running Windows Server 2003 on a 64-bit Itanium server which is also running 64-bit Oracle 10.2, and I'd like to install cx_Oracle for Python 2.5. I've used cx_Oracle before many times on both Windows and Linux, and I've also compiled it before on 32 bit versions of those platforms, but I've never tried an IA64 compile. None of the binary builds of cx_Oracle at http://cx-oracle.sourceforge.net/ are 64 bit, and I get an error after installing any of them when trying to run import cx_Oracle

How to test if your Linux Support SSE2

由 风流意气都作罢 提交于 2019-12-03 09:02:51
问题 Actually I have 2 questions: Is SSE2 Compatibility a CPU issue or Compiler issue? How to check if your CPU or Compiler support SSE2? I am using GCC Version: gcc (GCC) 4.5.1 When I tried to compile a code it give me this error: $ gcc -O3 -msse2 -fno-strict-aliasing -DHAVE_SSE2=1 -DMEXP=19937 -o test-sse2-M19937 test.c cc1: error: unrecognized command line option "-msse2" And cpuinfo showed this: processor : 0 vendor : GenuineIntel arch : IA-64 family : 32 model : 1 model name : Dual-Core Intel

How to test if your Linux Support SSE2

由 时光怂恿深爱的人放手 提交于 2019-12-03 00:37:32
Actually I have 2 questions: Is SSE2 Compatibility a CPU issue or Compiler issue? How to check if your CPU or Compiler support SSE2? I am using GCC Version: gcc (GCC) 4.5.1 When I tried to compile a code it give me this error: $ gcc -O3 -msse2 -fno-strict-aliasing -DHAVE_SSE2=1 -DMEXP=19937 -o test-sse2-M19937 test.c cc1: error: unrecognized command line option "-msse2" And cpuinfo showed this: processor : 0 vendor : GenuineIntel arch : IA-64 family : 32 model : 1 model name : Dual-Core Intel(R) Itanium(R) Processor 9140M revision : 1 archrev : 0 features : branchlong, 16-byte atomic ops cpu

Why does MSVC not support inline assembly for AMD64 and Itanium targets?

由 好久不见. 提交于 2019-11-29 13:17:01
Yesterday I learned that inline assembly (with the __asm keyword) is not supported under Microsoft Visual C++ when compiling for AMD64 and Itanium targets. Is that correct? And if so, does anyone know why they would not support inline assembly for those targets? It seems like a rather big feature to just drop... Correct, it still isn't supported in VS 2010 Beta 1 . My guess is that inline assembly is just too difficult to implement: the way Microsoft implemented it, it integrates with the surrounding C code so that data can flow in and out of the C code, and appropriate glue code is

Assembly registers in 64-bit architecture

由 你。 提交于 2019-11-29 09:40:33
问题 Following the answer about assembly registers' sizes: First, what sizes are eax , ax , ah and their counterparts, in the 64-bit architecture? How to access a single register's byte and how to access all the 64-bit register's eight bytes? I'd love attention for both x86-64 (x64) and Itanium processors. Second, what is the correct way to use the four registers for holding the first four parameters in function calls in the new calling convention? 回答1: With the old name all registers remain the

What is the difference between x64 and IA-64?

由 允我心安 提交于 2019-11-28 17:10:34
I was on Microsoft's website and noticed two different installers, one for x64 and one for IA-64. Reference: Installing the .NET Framework 4.5, 4.5.1 My understanding is that IA-64 is a subclass of x64, so I'm curious why it would have a separate installer. x64 is used as a short term for the 64 bit extensions of the "classical" x86 architecture; almost any "normal" PC produced in the last years have a processor based on such architecture. AMD invented the AMD64 extensions; Intel was more or less forced to implement them, and called them first IA-32e, then EM64T and finally Intel 64 (actually,

Why does MSVC not support inline assembly for AMD64 and Itanium targets?

由 送分小仙女□ 提交于 2019-11-28 07:12:23
问题 Yesterday I learned that inline assembly (with the __asm keyword) is not supported under Microsoft Visual C++ when compiling for AMD64 and Itanium targets. Is that correct? And if so, does anyone know why they would not support inline assembly for those targets? It seems like a rather big feature to just drop... 回答1: Correct, it still isn't supported in VS 2010 Beta 1. My guess is that inline assembly is just too difficult to implement: the way Microsoft implemented it, it integrates with the

What is the difference between x64 and IA-64?

由 青春壹個敷衍的年華 提交于 2019-11-27 10:06:19
问题 I was on Microsoft's website and noticed two different installers, one for x64 and one for IA-64. Reference:Installing the .NET Framework 4.5, 4.5.1 My understanding is that IA-64 is a subclass of x64, so I'm curious why it would have a separate installer. 回答1: x64 is used as a short term for the 64 bit extensions of the "classical" x86 architecture; almost any "normal" PC produced in the last years have a processor based on such architecture. AMD invented the AMD64 extensions; Intel was more
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