vhdl code (for loop) | 易学教程

问题

Description: I want to write vhdl code that finds the largest integer in the array A which is an array of 20 integers.

Question:
what should my algorithm look like, to input where the sequential statements are?

my vhdl code:

highnum: for i in 0 to 19 loop
i = 0; 
i < 20; 
i<= i + 1;
end loop highnum;

This does not need to be synthesizable but I dont know how to form this for loop a detailed example explaining how to would be appreciated.

回答1:

First of all you should know how have you defined the array in vhdl. Let me define an array for you.

    type array_of_integer array(19 downto 0) of integer;
    signal A : array_of_integer :=(others => 0);
    signal max : integer;
    -- Now above is the array in vhdl of integers all are initialized to value 0.

    A(0) <= 1;
    A(1) <= 2;
    --
    --
    A(19)<= 19;
    -- Now the for loop for calculating maximum 
    max <= A(0);
    for i in 0 to 19 loop 
      if (A(i) > max) then 
        max <= A(i);
      end if;
    end loop;

-- Now If you have problems in understating that where to put which part of code .. in a ----vhdl entity format .. i.e process, ports, etc... you can reply !

回答2:

Simply translating the C loop to VHDL, inside a VHDL clocked process, will work AND be synthesisable. It will generate a LOT of hardware because it has to generate the output in a single clock cycle, but that doesn't matter if you are just simulating it.

If that is too much hardware, then you have to implement it as a state machine with at least two states, Idle and Calculating, so that it performs only one loop iteration per clock cycle while Calculating, and returns to the Idle state when done.

来源：https://stackoverflow.com/questions/22003254/vhdl-code-for-loop

标签

for-loop

vhdl