问题
what does it mean : I have only 12 bits for immediate constants, so can I represent immediate constants only from 0 to 2^12 = 4096 ? Operand 2 , if it's a register, can have 32 bits, but why only 12 bits for immediate constants? Where does this number come from?
回答1:
It defined by the instruction set. E.g. the MOV instruction is encoded as
31 28 | 27 26 | 25 | 24 23 22 21 20 | 19 16 | 15 12 | 11 0 |
cond | 0 0 | I | 1 1 0 1 S | SBZ | Rd | shifter operand |
(see "ARM Architecture Reference Manual, 4.1.29 "MOV")
"Immediate" constants are encoded in the "shifter operand" which is 12 bits only. Other instructions have similar definitions are sometimes other widths.
This limitation exists because -- unlike on x86 -- instructions on ARM are always 32 bit or sometimes 16 bit when using Thumb(2). To support values which can not be expressed directly by a 12 bit binary digit, the shifter operand allows different addressing modes (e.g. left-shift, right-shift, rotating).
回答2:
It generally goes like this in ARM instructions, for example ADD and SUB.
imm12 is any value in the range 0-4095.
Such instruction is generally 4 bytes, 32bits but you wouldn't need that much bits to tell core to do extraction from 2 registers and put the result into another one. So instruction set architecture allows you to use remaining bits in a way to avoid extra memory usage. For example if you are going to extract 256 from a register, you could load that 256 from stack (which is memory and slow) or you could have it embedded in instruction which would be fast. Of course down side of such approach is to have a limited space, 12bits in this case for such operand usage.
Value range allowed by immediate constants differ among instructions and most of the time assembler seemingly changes your instruction into some other to get the same effect - or it provides pseudo instructions to do similar work (like ldr) . However now and then it fails to assemble your code and fails. In those cases it is best to go back ARM ARM and read about that specific instructions capabilities in regards to embedding immediate constants.
回答3:
Arm instruction encoding is 32 bit long and it is fixed unlike instruction encoding in x8086 instructions . You cannot have a arbitrary 32 bit constant encoded in instruction itself. If you look into arm v7 instruction set ,for arithmetic instructions you can have some 32 bit numbers encoded in instruction directly.Such numbers are encoded into 12 bits (a 32 bit number encoded as 12 bit in instruction). Look into architecture manual from arm.Sorry i do not have a link for you .
回答4:
Yes the fact that only 12 bits are available means that only 212 = 4096 distinct values can be represented.
These states can either be distributed with a constant step size ie. from 0 to 4095 (ignoring negative values), or they can be distributed non linearly. As explained here, the ARM architecture uses the 8 least significant bits (256 values) to represent a number and the 4 most significant bits (16 states) to scale up or down this number by a power of 2.
Thanks to this scaling property, the ARM architecture is able to represent a lot of useful large numbers that could otherwise not be represented (even with 16 bits). Unfortunately some of the 4096 states now map to the same number as explained here so only 3073 distinct values can be represented with this approach.
Programmers who want to work with immediates that are not in the set of 3073 valid immediates can use workarounds that require multiple clock cycles and/or memory in order to achieve the desired result.
Conclusion: this is just a different way of distributing the available numbers, not a (magical) way of representing 232 = 4294967296 distinct numbers using 212 = 4096 states!
来源：https://stackoverflow.com/questions/20071767/arm-why-only-12-bits-for-immediate-constants