Makefile execute echo only one time inside a rule

问题

I have this Makefile

$(MAIN) : $(OBJECTS)

$(OBJECTS) : %.c
     compile file

And i want to use printf for print something like "compiling" whenever a file needs compile and "done" if a file has been compiled at the end of every compiled for example:

Compiling
file1.c
file2.c
file3.c
Done

I have tried to use sentences like if from shell or ifeq from makefile but i need a variable and makefile doesn't let me change the value of a variable inside of a if i don't know why. How can i archive this?

回答1:

I think this is what you want:

 OBJECTS := file1.o file2.o file3.o

.PHONY: all compiling

all : $(OBJECTS)
    @echo Done

compiling:
    @echo Compiling

$(OBJECTS): file%.o : file%.c compiling
    @echo $<
    @compile $<

回答2:

I solved the problem making a variable MODE initialized to 0 and dividing my makefile in two parts one part check if something has been modified where in that case instead o update the fails i print my messages and then do $(MAKE) MODE=1 where i perform a normal makefile that update everything needed

Thanks to Renauld Pacalet in the question https://stackoverflow.com/a/51100086/10010027

来源：https://stackoverflow.com/questions/51110668/makefile-execute-echo-only-one-time-inside-a-rule