cortex-m

问题 I would like to count the number of Instructions per Cycle executed on an ARM cortex-M4 (or cortex-M3) processor. What it's needed is: number of instructions (executed at runtime) of the code I want to profile and number of cycles that the code takes to execute. 1 - Number of Cycles Use the cycle counter is quite easy and straightforward. volatile unsigned int *DWT_CYCCNT ; volatile unsigned int *DWT_CONTROL ; volatile unsigned int *SCB_DEMCR ; void reset_timer(){ DWT_CYCCNT = (int *

问题 I would like to count the number of Instructions per Cycle executed on an ARM cortex-M4 (or cortex-M3) processor. What it's needed is: number of instructions (executed at runtime) of the code I want to profile and number of cycles that the code takes to execute. 1 - Number of Cycles Use the cycle counter is quite easy and straightforward. volatile unsigned int *DWT_CYCCNT ; volatile unsigned int *DWT_CONTROL ; volatile unsigned int *SCB_DEMCR ; void reset_timer(){ DWT_CYCCNT = (int *

问题 I am using a Atmel SAM4E-16e on Atmel SAM4E-EK Board. I have written a bootloader for this configuration. The bootloader receives the .bin-File via UART and writes it into Flash. This works without problems, i made a hex-dump and it was exactly what i expected: Bootloader at 0x400000 (Flash Start Address of AT SAM4E) My Application at 0x420000 0x800000 is Flash End Address This is the C-Code: int main(void){ // Init and downloading the .bin to Flash binary_exc((void*) 0x420000); } int binary

问题 I am trying to communicate over I2C with a Pololu MinIMU9v2 from a TM4C123GXL Launchpad , but every time I try to write to the bus, I am getting I2C_MASTER_ERR_ADDR_ACK and I2C_MASTER_ERR_DATA_ACK . Printing out the slave address shows that it looks right, so I'm thinking this may be something I may be doing wrong with the use of the TI Launchpad driver library. Here's the initialization routine: void InitI2CBus(void) { // Initialize the TM4C I2C hardware for I2C0 SysCtlClockSet(SYSCTL_SYSDIV

问题 I am using STM32L486ZG board in thumb mode. I am running a simple bare-metal application without any RTOS. I have external SRAM connected to the board using FSM. The external SRAM is located at address 0x60000000. The system is initialized and running at 72MHz (i have tried this issue with frequency from 18-80 MHz) now in my main function i have following code: int main(){ asm volatile ( "push {r0}\n" "mov r0, #0x60000000\n" "add r0, #0x400\n" "stmdb r0!, {r1-r12}\n" "ldmia r0!, {r1-r12}\n"

问题 My code works well to upload first file in the loop to ftp. But it hangs once second file is going to be uploaded. I'm reading the SD card root folder using lib first I set the ftp connection using connectFTP() to establish also data transfer port. Next I'm calling the fileTransfer(); While loop function works well, until first file is transfered. Once second file meet If criteria if (fileTemp != fileName && fileTemp[0] == '1' && fileTemp[1] == '9') and send the client.print(F("STOR "));

问题 When the code below is run against a 16-bit integer machine like MSP430 micro controller, s32 yields 65446 #include <stdint.h> uint16_t u16c; int32_t s32; int main() { u16c = 100U; s32 = 10 - u16c; } My understanding is that 10 - u16c gets implicit type promotion to unsigned int. Mathematically 10 - u16c equals to -90. But how is it possible to represent a negative number as an unsigned int? When -90 gets promoted to unsigned int, does it mean that the sign of a number is ignored? Lets

问题 When the code below is run against a 16-bit integer machine like MSP430 micro controller, s32 yields 65446 #include <stdint.h> uint16_t u16c; int32_t s32; int main() { u16c = 100U; s32 = 10 - u16c; } My understanding is that 10 - u16c gets implicit type promotion to unsigned int. Mathematically 10 - u16c equals to -90. But how is it possible to represent a negative number as an unsigned int? When -90 gets promoted to unsigned int, does it mean that the sign of a number is ignored? Lets

问题 I am trying to retrieve the return address of an IRQ handler in my code. My aim is to save the value of the PC just before the watchdog timer expires and before the reset for debug purposes, using WDT_IRQHandler(). I am also testing this approach with other IRQs to check if I grasped the idea. But it seems I haven't. I have read the documentation available. I understood that when an exception happens, 8 registers are pushed to the stack: R0, R1, R2, R3, R12, LR, PC and XPSR. I have also read

问题 In the following code from core_cm4.h why is there a double cast ((uint32_t)(int32_t)IRQn) ? For example in the following function: __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) { NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); } What is the purpose of this? 回答1: Since CM4 software implements negative interrupt sources for core, you have to cast value first to 32bit signed integer and later to unsigned 32bit to make proper right