How to make a multicore system using the RISC-V Rocket-chip processor

ぃ、小莉子 提交于 2019-12-23 04:48:19

问题


I want to make a multicore using zedboard. I have a 2 question about that.

  1. I changed a variable 'NTILES' to 2 in rocket-chip/src/main/scala/Configs.scala for implementing multicore system.

  2. If I make a multicore, how do I confirm that? I tried using fork and background execution to check the modified system, but I received error message like below picture. And pthreads couldn't be compiled. I want to know the method to confirm the multicore system.

Also if you have any idea about making multicore for rocketchip, please notify me the knowhow. thanks.


回答1:


With NTILES=2 and the DefaultFPGAConfig, two cores may not fit on a zedboard. I would verify Vivado was able to complete successfully. You will probably need to decrease some of the other parameters (BTB, FPU, etc.).

The proxy kernel (riscv-pk) does not support multicore. To use linux, you will need to enable SMP support when building it. When doing menuconfig for linux, under "Platform Type" turn on "Symmetric Multi-Processing." For pthreads, I would copy the correct shared library from riscv-gcc-linux's compiler directory to your linux disk image.

Once you have SMP linux booting on the board, you can confirm it is multicore with cat /proc/cpuinfo. For testing your software (linux, disk image, your code), I would recommend using spike and moving to the FPGA when you are confident the parallel software is ready. Spike can simulate multicore.



来源:https://stackoverflow.com/questions/32517472/how-to-make-a-multicore-system-using-the-risc-v-rocket-chip-processor

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