Project on MIPS pipelined processor
问题 Okay this question is more of a discussion . I have this project of implementing a pipelined MIPS processor in VHDL . I am fully acquainted with the concepts of pipelining but I have never implemented it with VHDL . What are some good resources to learn implementation of pipelined processors in VHDL . I need a head start ? 回答1: There's a book Digital Design and Computer Architecture by David Harris and Sarah Harris. See Chapter 7 on Microarchitecture. 7.5 talks about pipelining using a MIPS