mmu

Linux x86: Where is the real mode address space mapped to in protected kernel mode?

耗尽温柔 提交于 2019-12-06 09:40:12
In Linux running on an x86 platform where is the real mode address space mapped to in protected kernel mode? In kernel mode, a thread can access the kernel address space directly. The kernel is in the lower 8MB, The page table is at a certain position, etc (as describe here ). But where does the real mode address space go? Can it be accessed directly? For example the BIOS and BIOS addons (See here )? Ulfalizer (My x86-fu is a bit weak. I'll add some tags so that other people can (hopefully) correct me if I'm lying anywhere.) Physical addresses are the same in real and protected mode. The only

Logging Memory Access Footprint

。_饼干妹妹 提交于 2019-12-06 07:01:33
问题 I found mtrace by Dr.Clements. Although it is useful, it doesn't work normally in the situation I need. I intend to use the record to understand memory access pattern in different scenario. Can someone share the related experience? Any suggestion will be appreciated. 0313 Updated : I'm trying to use qemu-mtrace to boot ubuntu 16.04 with linux-mtrace(3.8.0), but it only show several error message and terminated. Hope some tool be able to log every access. $ ./qemu-system-x86_64 -mtrace-enable

Disable write protection for memory pages in ARM

[亡魂溺海] 提交于 2019-12-06 01:37:25
问题 I've researched on the topic for disabling of write protection on kernel text on linux, and I can only find solutions for x86 linux, which is temporarily clearing bit 16 of the cr0 register, write to the memory, and then setting bit 16 of the cr0 register again. However, this does not work for ARMv6 and above. An example of this is within this page: Linux Kernel: System call hooking example. cr0 register is not present within the ARM architecture, and a few of the functions stated within the

How does Linux support more than 512GB of virtual address range in x86-64?

允我心安 提交于 2019-12-05 00:08:23
问题 The user virtual address space for x86-64 with Linux is 47 bit long. Which essentially means that Linux can map a process with around ~128 TB virtual address range. However, what confuses me that x86-64 architecture supports ISA defined 4-level hierarchical page table (arranged as radix-tree) for each process. The root of the page table can only map up to 512 GB of contiguous virtual address space. So how Linux can support more than 512GB of virtual address range? Does it uses multiple page

Logging Memory Access Footprint

老子叫甜甜 提交于 2019-12-04 13:32:01
I found mtrace by Dr.Clements. Although it is useful, it doesn't work normally in the situation I need. I intend to use the record to understand memory access pattern in different scenario. Can someone share the related experience? Any suggestion will be appreciated. 0313 Updated : I'm trying to use qemu-mtrace to boot ubuntu 16.04 with linux-mtrace(3.8.0), but it only show several error message and terminated. Hope some tool be able to log every access. $ ./qemu-system-x86_64 -mtrace-enable -mtrace-file mtrace.out -hda ubuntu.img -m 1024 Error: mtrace_entry_ascope (exit, syscall:xx) with no

Use ARM TrustZone to prevent access to memory region from Non-Secure world

浪子不回头ぞ 提交于 2019-12-04 11:26:22
Context I want to have a rich GNU/Linux OS running in the Normal world and a small OS with an integrated Monitor running in the Secure world . Requirement We have to absolutely avoid the Normal world to access the Secure world memory region. Question Which feature(s) of TrustZone do we need to use/activate to fulfill this requirement? I'd like to use only the necessary features to minimize the work needed. Details I've read quite a lot of ARM TrustZone documentation, I'm aware of TZPC , TZASC , MMU with security extensions, but I can't figure out how to avoid the following threat: What would

Measuring TLB miss handling cost in x86-64

早过忘川 提交于 2019-12-04 09:25:20
问题 I want to estimate the performance overhead due to TLB misses on a x86-64 (Intel Nehalem) machine running Linux. I wish to get this estimate by using some performance counters. Does anybody has some pointers on what is the best way to estimate this? Thanks Arka 回答1: If you can get access to a "Westmere" based system the performance characteristics of your code should be quite similar to what you have on the "Nehalem", but you will have access to a new hardware performance counter event that

ARM Linux kernel page table

你离开我真会死。 提交于 2019-12-04 08:47:31
问题 Ref. Linux kernel ARM Translation table base (TTB0 and TTB1) I have father doubt/query on topic discussed in previous link: 0 to 0xbfffffff is a lower part of memory (for user processes) and managed by the page table in TTB0, it contains the page-table of the current process Ref. arm/include/asm/pgtable-2level.h : PTRS_PER_PGD =2048, PTRS_PER_PMD =1, PTRS_PER_PTE =512 0xc0000000 to 0xffffffff is upper part (OS and memory-mapped I/O) of the address space managed/translated by the page table in

虚拟地址到物理地址的地址变换过程【转】

拜拜、爱过 提交于 2019-12-04 06:06:26
转自: https://blog.csdn.net/yunfenglw/article/details/45603823 版权声明:本文为博主原创文章,遵循 CC 4.0 BY-SA 版权协议,转载请附上原文出处链接和本声明。 本文链接:https://blog.csdn.net/yunfenglw/article/details/45603823 虚拟地址到物理地址的地址变换过程 2015-05-09 青岛 张俊浩 内容部分来自《Unix内核源码剖析》 软件环境:UNIX V6 硬件环境:PDP-11/40(16位计算机) 第二章《进程》一节阐述了PDP-11/40的虚拟地址到物理地址的地址变换过程。 MMU通过APR(Active Page Register)寄存器将虚拟地址变换为物理地址。 APR寄存器由一个PAR(Page Address Register)寄存器和一个PDR(Page Description Register)寄存器构成。 内核通过向与执行进程相对应的、供用户进程用使用的APR设定适当的值,保证各用户拥有独立的虚拟地址空间。 APR共有8组,APR[0]-APR[7]。进程的虚拟地址空间以页或者段为单位进行管理,一组APR对应一页。APR{PAR,PDR},PAR用来保存与各页物理地址的基地址有关信息,PDR用来保存各页的块(以64字节为单位

Disable write protection for memory pages in ARM

三世轮回 提交于 2019-12-04 05:48:50
I've researched on the topic for disabling of write protection on kernel text on linux, and I can only find solutions for x86 linux, which is temporarily clearing bit 16 of the cr0 register, write to the memory, and then setting bit 16 of the cr0 register again. However, this does not work for ARMv6 and above. An example of this is within this page: Linux Kernel: System call hooking example . cr0 register is not present within the ARM architecture, and a few of the functions stated within the answers from the link, like lookup_address, change_page_attr etc. aren't present within ARM as well. I