hardware-programming

How does CPU perform operation that manipulate data that's less than a word size

≯℡__Kan透↙ 提交于 2021-02-05 11:39:49
问题 I had read that when CPU read from memory, it will read word size of memory at once (like 4 bytes or 8 bytes). How can CPU achieve something like: mov BYTE PTR [rbp-20], al where it copies only one byte of data from al to the stack. (given the data bus width is like 64 bit wide) Will be great if anyone can provide information on how it's implemented on the hardware level. And also, as we all know that when CPU execute program, it has program counter or instruction pointer that points to the

what does 3'bzzz stands for in verilog?

走远了吗. 提交于 2020-01-16 00:43:17
问题 I have the following code but I don’t know what the 3'bzzz stands for: `timescale 1ns / 1ps module reg_tercer_estado(entrada,hab,salida); input [2:0] entrada; input hab; output [2:0] salida; reg [2:0] auxsalida; always @(entrada) begin case (hab) 1'b0: auxsalida=entrada; 1'b1: auxsalida=3'bzzz; endcase end assign salida=auxsalida; endmodule 回答1: According to “HDL Compiler for Verilog” manual, 3'bzzz is 3-bit number, and z is a condition for 'disconnected' or 'high impedance' , and it's also

Intel i7 replacement and possible programming [closed]

对着背影说爱祢 提交于 2019-12-13 23:21:57
问题 Closed. This question is off-topic. It is not currently accepting answers. Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 6 years ago . My Toshiba laptop has just broken, I want to take out its CPU (intel i7) and place it onto my old desktop (it has windows XP). how can I remove the CPU? Do I need to reporgram my CPU for Windows XP? Can you list what stuff I need for it? 回答1: there is a very large amount of sarcasm happening here that you

Programmatically restart USB device in Windows

吃可爱长大的小学妹 提交于 2019-12-10 15:33:37
问题 Some software I am developing requires the presence of a USB device (which I interact with as a SerialPort, with a USB-to-UART bridge). Sometimes, after a computer is being restarted from hibernation, the device is not being detected, and I can no longer write to, or read from, the device through its serial port. Having read/write access to the device is necessary. I cannot rely on the user to take any action (physical or otherwise), so I need a way to restart the device programmatically. How

How to type hexadecimal into binary using DOS Interrupt in Assembly?

谁都会走 提交于 2019-12-04 07:11:18
问题 following code is including a hexadecimal number (relevant to ASCII code assume that it is obtained from keyboard), I want to print this hex number to the screen but in "binary" using DOS Interrupt. NUMLOCK is 45h. [org 0x0100] mov AL, 45 ;moving NUMLOCK hexadecimal(ASCII code) to AX ~~How to display its binary relevant to screen using DOS Interrupt? 回答1: DOS Interrupt has only these services outputting to screen: AH = 02h -WRITE CHARACTER TO STANDARD OUTPUT AH = 06h - DIRECT CONSOLE OUTPUT

VHDL - How should I create a clock in a testbench?

删除回忆录丶 提交于 2019-12-03 04:00:54
问题 How should I create a clock in a testbench? I already have found one answer, however others on stack overflow have suggested that there are alternative or better ways of achieving this: LIBRARY ieee; USE ieee.std_logic_1164.ALL; ENTITY test_tb IS END test_tb; ARCHITECTURE behavior OF test_tb IS COMPONENT test PORT(clk : IN std_logic;) END COMPONENT; signal clk : std_logic := '0'; constant clk_period : time := 1 ns; BEGIN uut: test PORT MAP (clk => clk); -- Clock process definitions( clock

VHDL - How should I create a clock in a testbench?

杀马特。学长 韩版系。学妹 提交于 2019-12-02 16:20:05
How should I create a clock in a testbench? I already have found one answer, however others on stack overflow have suggested that there are alternative or better ways of achieving this: LIBRARY ieee; USE ieee.std_logic_1164.ALL; ENTITY test_tb IS END test_tb; ARCHITECTURE behavior OF test_tb IS COMPONENT test PORT(clk : IN std_logic;) END COMPONENT; signal clk : std_logic := '0'; constant clk_period : time := 1 ns; BEGIN uut: test PORT MAP (clk => clk); -- Clock process definitions( clock with 50% duty cycle is generated here. clk_process :process begin clk <= '0'; wait for clk_period/2; --for

process statement in vhdl

核能气质少年 提交于 2019-11-26 23:45:45
问题 I am trying to learn VHDL and struggling with some of its basics. The question is as follows: Process statement is described to contain code that runs sequentially (one line after the other). I want to ask why can't one run concurrent code in a process statement (means all lines execute in parallel). Secondly, if process statement contains sequential code, how can it model for example, three flip-flops concurrently e.g., --inside process statement Q1 <= D1; Q2 <= Q1; Q3 <= Q2; 回答1: Sequential