问题
I read Intel manual about address calculation in 64 bit mode. Suppose we have 64 bit mode, default address size is 64 bit. Suppose also that instruction in question is preceded by address size override prefix, so address size becomes 32 bit.
Now, imagine that instruction encodes memory operand with address specified by register number 0 (rax/eax/ax ...).
Now the thing that I don't fully understand, whether CPU looks only at eax value and internally zero-extends it to form "native" 64 bit address or it looks at whole rax value and truncate it to valid 32 bit range (for example, rax contains something like 5Gb and CPU cuts it to max 32 bit address).
回答1:
When 32-bit addressing is used on 64-bit processors the result of the address calculation is truncated to 32-bits and then zero extended to 64-bits. Note that 32-bit addressing is defined as using using 32-bit registers, so if RAX contains 140000000h (5GB) the value of EAX (40000000h) is used instead. Although this doesn't make much of a difference in practice.
From the Intel 64 and IA-32 Architectures Software Developer’s Manual Volume 1: Basic Architecture:
All 16-bit and 32-bit address calculations are zero-extended in IA-32e mode to form 64-bit addresses. Address calculations are first truncated to the effective address size of the current mode (64-bit mode or compatibility mode), as overridden by any address-size prefix. The result is then zero-extended to the full 64-bit address width. Because of this, 16-bit and 32-bit applications running in compatibility mode can access only the low 4 GBytes of the 64-bit mode effective addresses. Likewise, a 32-bit address generated in 64-bit mode can access only the low 4 GBytes of the 64-bit mode effective addresses.
来源：https://stackoverflow.com/questions/30290900/x86-64-address-calculation-in-64bit-mode-with-32-bit-address-size