问题
Can anyone confirm that for example Intel I3 CPU has 2 physical cores and 4 logical cores, so if I set Process afinity to Core #0 so that means I set on first physical cores 1 logical core, but if I set on Core #1 so it means I set on first physical core 1 HyperThreading core,
but how about AMD CPU since they got somekind of "modules" atleast what I read on internet,
how to work with amd cpus?
And does intel ALWAYS has this come physical core contains 1 logical and 1 HT core?
How about AMD physical core combo?
回答1:
Some Intel CPUs have hyperthreading disabled, e.g. quad core i5 CPUs usually have HT disabled. e.g. Skylake desktop chips have 4c8t (4 cores / 8 threads) on the i7 models, 4c4t on the i5 chips (quad core without HT), and 2c4t on the i3 chips (dual core with HT).
Hyperthreading just uses the already-existing way that multi-core / multi-socket SMP systems boot and discover CPUs. An HT-aware OS has to check the physical ID of each CPU to find out which if any of them share a physical core with which other logical CPU.
If you disable HT in the BIOS, the system only presents itself as having one CPU per physical core, instead of 2. (Or 4 in Xeon Phi).
The mapping from logical core to physical core isn't standardized.
On my SKL desktop (i7-6700k in an Asus Z170 Pro Gaming mobo), Linux detects my cores as:
log phys
0 0
1 1
2 2
3 3
4 0
5 1
6 2
7 3
But on a Haswell laptop, it was
log phys
0 0
1 0
2 1
3 1
IDK if any system have weirder logical->physical mappings; I think either wrapping
but how about AMD CPU since they got somekind of "modules" atleast what I read on internet
Bulldozer-family uses pairs of weak integer cores sharing a SIMD / FPU unit and some cache, and calls that a "cluster". It's not good for single-threaded workloads (because one of the two integer cores sits idle), but more effecting than Intel's HT when there are enough threads to keep all the cores busy.
Ryzen is a fine-grained SMT (Simultaneous Multithreading) architecture (the generic CPU-architecture term for what HT is) that's very much like Intel's, but with an even wider pipeline.
Ryzen organizes its cores into clusters of 4 which share an L3 cache (https://www.reddit.com/r/hardware/comments/6s1m80/why_did_amd_design_ryzen_as_2_quadcore_ccxs/). There's an interconnect between two or more CCX clusters of cores. This is unrelated to SMT.
来源：https://stackoverflow.com/questions/50579931/physical-core-and-logical-cores-on-diffrent-cpu-amd-intel