问题
I'm trying to port some ARM NEON code to AltiVec. Our NEON code has two LOAD's, one ROT, one XOR and a STORE so it seems like a simple test case. According to IBM's vec_rl documentation:
Each element of the result is obtained by rotating the corresponding element of a left by the number of bits specified by the corresponding element of b.
The docs go on to say vector unsigned int is the largest data type unless -qarch=power8, in which case vector unsigned long long applies.
I'd like to perform a 128-bit rotate, and not 32-bit or 64-bit rotation of individual elements. The bit positions are 19, 31, 67, 97, and 109. They are not byte aligned. (The constants arise from the ARIA block cipher).
Are 4x32 and 2x64 the largest AltiVec data arrangements? Is it possible to rotate a 128-bit value in Altivec?
If the packed rotate is the only operation available, then is it a best practice to do the bit twiddling in C or in AltiVec?
回答1:
You can do a rotate by a multiple of 8 bits using vsld (vec_sld), then to handle any remaining rotation of < 8 bits you'll probably need to use vsl + vsr + vsel (vec_sll + vec_srl + vec_sel).
来源：https://stackoverflow.com/questions/46014463/is-it-possible-to-rotate-a-128-bit-value-in-altivec