We are developing a system with a custom processor, Microblaze and some peripherals in VC709 FPGA using Xilinx Vivado. We are using two 'PCIe : BARs' in 'AXI Bridge for PCI express'.
Initially the command 'lspci -vv' used to show memory regions in the Ubuntu teminal.
$ lspci -vv
0a:00.0 Memory controller: Xilinx Corporation Device 7038 | 0a:00.0 Memory controller: Xilinx Corporation Device 7018
Subsystem: Xilinx Corporation Device 0007 | Subsystem: Xilinx Corporation Device 0008
Physical Slot: 3 | Physical Slot: 3
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- Pa| Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- Pa
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-| Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
Interrupt: pin A routed to IRQ 16 | Interrupt: pin A routed to IRQ 16
Region 0: Memory at fbff0000 (32-bit, non-prefetchable) [size=| ----------------------------------------------------------------------
Region 1: Memory at fb800000 (32-bit, non-prefetchable) [size=| ----------------------------------------------------------------------
Capabilities: <access denied> | Capabilities: <access denied>
Kernel modules: riffa
I have created a copy of the project and edited something in the design (which I don't remember unfortunately) and now the result of 'lspci -vv' is as follows. Please note that Region 0 and Region 1 are missing now.
$ lspci -vv
0a:00.0 Memory controller: Xilinx Corporation Device 7018
Subsystem: Xilinx Corporation Device 0008
Physical Slot: 3
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 16
Capabilities: <access denied>
Kernel modules: riffa
Q: What could be the reason?
Notes:
- The block design and connections are exactly same for both the projects
- The options for 'AXI bridge for PCI express Gen3.0 subsystem' are the same in both the projects
Thanks :)
Extra information required by the community
$ sudo lspci -vv
0a:00.0 Memory controller: Xilinx Corporation Device 7018
Subsystem: Xilinx Corporation Device 0008
Physical Slot: 3
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 16
Capabilities: [80] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [c0] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x8, ASPM unknown, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range B, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [100 v2] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Kernel modules: riffa$ sudo od -tx1z -Ax /proc/bus/pci/0a/00.0
000000 ee 10 38 70 43 00 10 00 00 00 80 05 10 00 00 00 >..8pC...........<
000010 00 00 ff fb 00 00 00 00 00 00 00 00 00 00 00 00 >................<
000020 00 00 00 00 00 00 00 00 00 00 00 00 ee 10 07 00 >................<
000030 00 00 00 00 80 00 00 00 00 00 00 00 0b 01 00 00 >................<
000040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
000080 01 90 03 00 08 00 00 00 00 00 00 00 00 00 00 00 >................<
000090 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
0000a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
0000b0 11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
0000c0 10 00 02 00 02 80 00 00 16 58 09 00 83 f0 43 00 >.........X....C.<
0000d0 40 00 42 10 00 00 00 00 00 00 00 00 00 00 00 00 >@.B.............<
0000e0 00 00 00 00 12 00 00 00 00 00 00 00 0e 00 00 00 >................<
0000f0 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
000100 01 00 02 30 00 00 10 00 00 00 10 00 20 00 00 00 >...0........ ...<
000110 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >. ..............<
000120 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
000150 03 00 01 30 00 00 00 00 00 00 00 00 00 00 00 00 >...0............<
000160 04 00 41 27 00 00 00 00 f0 80 0b 00 00 00 00 00 >..A'............<
000170 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
0001b0 00 00 00 00 00 00 00 00 18 00 01 30 00 00 00 00 >...........0....<
0001c0 16 00 01 30 07 00 00 00 00 00 00 00 00 01 00 00 >...0............<
0001d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
000270 00 00 00 00 17 00 01 30 05 00 00 00 00 00 00 00 >.......0........<
000280 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
000300 19 00 01 00 00 00 00 00 00 00 00 00 7f 7f 7f 7f >................<
000310 7f 7f 7f 7f 7f 7f 7f 7f 7f 7f 7f 7f 00 00 00 00 >................<
000320 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
0003c0 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
0003d0 00 00 00 00 01 00 00 80 00 00 00 00 00 00 00 00 >................<
0003e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
*
001000The memory space is not enabled in your device (I did not notice this in the first place).
In the device listing on the left, in the Control line, you have "Mem+" but on the right you have "Mem-" (ditto for I/O access). In the PCI spec, the Mem flag is bit 1 of the Command register.
Typically, in linux, a driver calls pci_enable_device function, which brings the device online and enables memory and/or I/O access as directed by the driver (that is, it writes a 1 into either or both bits). See also Documentation/PCI/pci.txt for guidance on writing drivers.
My guess is that lspci just isn't showing the BAR because the device's memory space isn't enabled; it appears that the same address -- 0xfbff0000 -- has been assigned to BAR 0 at least [see offset 0x10 in the /proc/bus/pci dump]. There is no address programmed in the BAR 1 address slot at offset 0x14.
I can see that this is a non-prefetchable 32-bit BAR
I found a similar problem when using an Altera FPGA. If I made the BARs 32-bit, they did not appear when I did lspci. When I changed to 64-bit prefetchable BARs, I saw them as expected when I run lspci.
来源：https://stackoverflow.com/questions/53479150/memory-regions-not-displayed-in-lspci-vv-while-using-axi-bridge-for-pci-expr