xilinx-ise | 易学教程

Verilog Tri-State Issue (Xilinx Spartan 6)

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问题 Referring to my earlier question here, I've been utilizing tri-states to work with a common bus. I still appear to have some implementation issues. The tri-states use this type of code: assign io [width-1:0] = (re)?rd_out [width-1:0]:{width{1'bz}}; Synthesis and translation goes well. No warnings or errors I wasn't expecting (I was expecting some since this is only a trial run and most of the components don't do anything and will hence be left unconnected). But when I actually try to

Using BUFG to drive clock loads

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问题 I'm attempting to work with pixel data that is output to a DVI chip. A variety of clock frequencies are used because the DVI chip registers are programmed using I2C (therefore needs a clock < 500 KHz) - from a clock divider. The DVI chip needs a 40 MHz differential pixel clock, however, the DVI takes displays half a byte twice a cycle, so a further 80 MHz clock is needed to push each half of the pixel onto the data lines with each half cycle, these are from a DCM. This has led to a variety of

Using BUFG to drive clock loads

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I'm attempting to work with pixel data that is output to a DVI chip. A variety of clock frequencies are used because the DVI chip registers are programmed using I2C (therefore needs a clock < 500 KHz) - from a clock divider. The DVI chip needs a 40 MHz differential pixel clock, however, the DVI takes displays half a byte twice a cycle, so a further 80 MHz clock is needed to push each half of the pixel onto the data lines with each half cycle, these are from a DCM. This has led to a variety of problems. I attempted to just use the double pixel clock rate to swap each half of the pixel, however

Memory regions not displayed in 'lspci -vv' while using 'AXI bridge for PCI express Gen3.0 subsystem'

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We are developing a system with a custom processor, Microblaze and some peripherals in VC709 FPGA using Xilinx Vivado. We are using two 'PCIe : BARs' in 'AXI Bridge for PCI express'. Initially the command 'lspci -vv' used to show memory regions in the Ubuntu teminal. $ lspci -vv 0a:00.0 Memory controller: Xilinx Corporation Device 7038 | 0a:00.0 Memory controller: Xilinx Corporation Device 7018 Subsystem: Xilinx Corporation Device 0007 | Subsystem: Xilinx Corporation Device 0008 Physical Slot: 3 | Physical Slot: 3 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- Pa| Control: I/O-