Seven Segment Display outputs are unknown
问题 I'm trying to make a counter that counts from 0-9 and displays on my Nexys A7's seven segment display. The code compiles, but in the testbench it shows that all the outputs are unknown. I tested my clock divider module, and it looks fine. I'm not sure why it isn't working. module BCD_sevenseg( input clk, output segA, segB, segC, segD, segE, segF, segG, segDP, div_clk ); counter module1( .clk(clk), .div_clk(div_clk) ); reg[3:0] BCD; //BCD signal is 4 bits wide always@(posedge clk) //check