quartus

quartus 10 for linux 安装

╄→гoц情女王★ 提交于 2019-12-02 07:47:09
我的系统是fedora 14 命令如下: su root password: sh 10.0_quartus_linux.sh 对quartus*.sh进行安装 cd 10.0_quartus_linux/ ./setup 会出现 Creating directory bin Verifying archive integrity... All good. Uncompressing Altera Installer............................................................................................................................ Fontconfig error: "conf.d", line 1: no element found Fontconfig warning: line 73: unknown element "cachedir" Fontconfig warning: line 74: unknown element "cachedir" ./altera_installer_gui: symbol lookup error: /usr/lib/libXi.so: undefined symbol:

Quartus 13.1安装心得

会有一股神秘感。 提交于 2019-12-02 07:46:03
安装参考链接: FPGA学习系列:1.quartus II 13.1 软件安装以及破解 果然成功了,之前也试着安装过,都没有成功,这次谈谈安装重要心得。 为什么要用Quartus? 虽然Quartus用起来没有Vivado之类的舒服(个人感觉哈),但是都是软件,干这一行的,类似软件不会用,有点说不过去。 其次,Quartus的RTL原理图,效果是真的好看。 安装需要注意的是,包括下载的时候,把你的杀毒软件关了,否者他会把你的破解文件当成病毒。 下载好的安装包类似这个: 我们需要操作的是: 双击QuartusSetup-13.1.0.162.exe 一直默认安装即可,安装完成的界面: 安装完成以后,桌面上将会出现quartus II 快捷方式的图标,为了能够正常的使用,必须进行破解。具体的操作和具体事项如下: 1.关闭电脑所有的杀毒以及保护软件。 2.双击quartus ii,出现如下界面: 3.选择最后一个 “if you have a ******“,然后点击OK,界面 4.复制一个“Network Interface Card(NIC) ID“,例如:2089841f9ce1(只复制一个就行,不要三个都复制)。 5.打开安装包(已经解压完成的文件夹),界面如下: 6.根据自己系统的选择解压破解器,大家可以解压到当前文件夹(本人的电脑是64位的,后续操作都以64位的来说明)

安装Quartus和Modelsim

只谈情不闲聊 提交于 2019-12-02 07:45:44
链接:https://pan.baidu.com/s/1r-QIsE5_TXFmufl5JBifjw 提取码:k1uz 我是先在D盘下建了一个Verilog文件夹。 一、先安装Modelsim 1.解压Crack-Modelsim-Altera+10.1d.zip到verilog文件夹,运行ModelSimSetup-13.0.1.232.exe。(要保证路径没有中文符哦~) 2.根据readmefirst.txt中内容操作: 首先将MentorKG.exe和patch_dll.bat复制到\modelsim_ase\win32aloem路径中; 运行patch_dll.bat。我的电脑出现闪退,并不能另存为文件,可以在verilog文件夹中搜索LICENSE.TXT,并复制到\modelsim_ase\win32aloem路径中。 最后进入控制面板\系统和安全\系统\高级系统设置\环境变量,新建环境变量MGLS_LICENSE_FILE,内容是D:\verilog\modelsim_ase\win32aloem\LICENSE.TXT(别忘了根目录后加LICENSE.TXT哦~) 然后就可以运行D:\verilog\modelsim_ase\win32aloem下的modelsim.exe文件啦,他的图标是个大写M~。 二、安装Quartus 主要是按照“读我.txt”啦~ 1

quartus和modelsim之间的大坑

╄→гoц情女王★ 提交于 2019-12-02 07:43:55
quartus和modelsim之间的大坑 唉,人生何其多坑 文章目录 quartus和modelsim之间的大坑 BUG1 BUG2 BUG3 BUG4 BUG5 提醒 美化 因为解决bug的时候没有截图,所以合并了一些忘记的,大家对号入座吧 BUG1 The ModelSim - Intel FPGA software comes packaged with precompiled simulation libraries. Do not compile simulation libraries if you are using the ModelSim - Intel FPGA software. BUG2 Cannot launch the ModelSim software because you did not specify the path to the executables of the ModelSim software. BUG3 Nativelink TCL script failed with errorInfo: Invalid user compiled directory 这是因为我们要用的是modelsim-intel,而不是modelsim.所以这个bug会在两个地方出现: 错误设置编译器为modelsim,解决方法: 导航栏

设置 Quartus II 的仿真时间大于 1us

家住魔仙堡 提交于 2019-12-02 00:38:09
Quartus II 仿真的默认时长是 1us。 设置时钟时看到 End time 想修改时长,把默认的 1us 改成 10us。 然后提示 End time 不合法。(只能设置为 0 到 1us) 正确的做法是在菜单栏选择 Edit -> End time,然后将 time 设置为 10us 就可以了。 来源: https://www.cnblogs.com/wulitaotao/p/11723425.html

Altera Quartus Error (12007): Top-level design entity “alt_ex_1” is undefined

感情迁移 提交于 2019-11-30 10:05:00
I've looked at all the previous questions and no one seems to have a problem as simple as mine. Also I've searched the web and can't find a solution. I'm new to VHDL and am trying to compile the simple example provided by Altera, which is as follows: library ieee; use ieee.std_logic_1164.all; entity light is port(x1, x2: in std_logic; f: out std_logic); end light; architecture LogicFunction of light is begin f <= (x1 and not x2) or (not x1 and x2); end LogicFunction; I followed the project creation steps in the Altera tutorial , but when I try to compile the project I get the error: Error

ModelSim-Altera error

筅森魡賤 提交于 2019-11-30 04:30:23
问题 I'm using Ubuntu Linux 14.04 LTS with Altera Quartus 15.0 web-edition and I'm having a hard time simulate my design due to licensing errors. I'm designing an LCD_driver for the VEEK-MT's LCD touch screen by terasic with the Cyclone IV EP4CE115 by Altera. Honestly, I don't have much of experience with simulation software like ModelSim-Altera but I do know how to use .vwf files and simulate with them, I know as well how to use signaltap logic analyzer. After creating the usinversity program

Compiling *.vhdl into a library, using Altera Quartus II

安稳与你 提交于 2019-11-29 14:57:56
I am trying to use 'Floating point and Fixed point package' as a part of my filter design in VHDL. I am using Altera Quartus II as the development environment. I downloaded the file package from the website: http://www.vhdl.org/fphdl/ , now available at http://web.archive.org/web/20160305202256/http://www.vhdl.org/fphdl/ In their user guide, below is mentioned: 'fixed_float_types_c.vhdl', 'fixed_pkg_c.vhdl' and 'float_pkg_c.vhdl' should be compiled into a library called "ieee_proposed". However, I do not exactly know how I can compile the mentioned *.vhdl files into a library using Altera

Altera Quartus Error (12007): Top-level design entity “alt_ex_1” is undefined

点点圈 提交于 2019-11-29 14:44:42
问题 I've looked at all the previous questions and no one seems to have a problem as simple as mine. Also I've searched the web and can't find a solution. I'm new to VHDL and am trying to compile the simple example provided by Altera, which is as follows: library ieee; use ieee.std_logic_1164.all; entity light is port(x1, x2: in std_logic; f: out std_logic); end light; architecture LogicFunction of light is begin f <= (x1 and not x2) or (not x1 and x2); end LogicFunction; I followed the project

PC机上常用 EDA 软件

天大地大妈咪最大 提交于 2019-11-28 02:37:01
http://bbs.fudan.edu.cn/bbs/tcon?bid=142&f=39 PC机上常用 EDA 软件介绍本站网址: http://eda163.com/ (一)altera公司软件 GNU tools and Excalibur V3.0(一张光盘) GNU tools and Excalibur 3.0。与Qu artus II v3.0 full同时推出的工具软件。 Excalibur_gnu_q40(一张光盘) GNU tools and Excalibur 4.0。与Quartus II v4.0 full同时推出的工具软件。 Maxplus II full V10.1(一张光盘) Maxplus II full 10.1,FULL版本确实不错,比 baseline强多了。。 MAX+PLUS II是一个完全集成的设计体系,包括设计输入、综合、 仿真、布局布线以及时序分析。 Maxplus II full V10.2(一张光盘) Maxplus II full 10.2。MAX+PLUS II full 的 新版本。 Modelsim oem V5.7c for Altera(一张光盘) Modelsim oem 5.7c for Altera。配 套Quartus II v3.0 full使用的Modelsim OEM V5.7C版本。 Modelsim