memory-segmentation | 易学教程

Which segment register is used by default?

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问题 I am studying computer architecture from the Intel Manual. The thing that I understand is that the instructions that we give are logical addresses which consist of a segment selector and an offset. It is basically CS register<<4 + offset . The Segment Selector maps to the GDT or LDT as given in the TI bit of the segment selector. GDT consists of Segment Descriptors which have BASE , LIMIT and RPL and the output is base address. This base address + offset provides the logical address . What

Using GDB to read MSRs

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问题 Is there some way to read the x86-64 model-specific registers, specifically IA32_FS_BASE and IA32_GS_BASE, while debugging a program using GDB? Less preferable would be a solution using a dynamic instrumentation package like Intel's Pintool, but it would be appreciated all the same. 回答1: If you prefer not changing your code (or if the code is not available) you could do something similar to amdn's answer in the following way. The call to arch_prctl requires a pointer to a uint64_t, for which

Using GDB to read MSRs

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Is there some way to read the x86-64 model-specific registers, specifically IA32_FS_BASE and IA32_GS_BASE, while debugging a program using GDB? Less preferable would be a solution using a dynamic instrumentation package like Intel's Pintool, but it would be appreciated all the same. If you prefer not changing your code (or if the code is not available) you could do something similar to amdn's answer in the following way. The call to arch_prctl requires a pointer to a uint64_t, for which I use the address to an empty portion of the stack (8 bytes below the current stack pointer). After the call

Detail about MSR_GS_BASE in linux x86 64

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I tried to figure out the details of MACRO current in Linux kernel. The final assembly code of current is: movq %%gs:0xb000,%0 The code above can work! But when I print the %%gs, its value is 0, so the %%gs points to the first item of GDT NULL!!?? How it works? mov %%gs, %0 Instead, the base of gs is in MSR_GS_BASE, and the current can be replaced like: /*0xb000 is the offset of per_cpu__current_task*/ cur_task = (unsigned long*)(x86_rdmsr64(MSR_GS_BASE) + 0xb000); println("cur_task:%p",*cur_task); My questions is: %gs points to the first item of GDT NULL!!?? How it works as read from MSR_GS

Difference between DPL and RPL in x86

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问题 Reading intel x86 Manual and other sources, i did not understand the difference between DPL (Descriptor privilege level) and RPL (Requested privilege level). Why is there necessity to have both? Thank you so much 回答1: Good question. CPL vs. DPL vs. RPL To make this simpler, let's first just consider CPL and DPL: The CPL is your current privilege level. The DPL is the privilege level of a segment. It defines the minimum 1 privilege level required to access the segment. Privilege levels range

Differences or similarities between Segmented paging and Paged segmentation?

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I was studying combined paging/segmentation systems and in my book there were two approaches to this : 1.paged segmentation 2.segmented paging I could not make out the difference between the two. I think in paged segmentation the segment is divided into pages and in segmented paging the pages are divided into segments, though I don't know if I am right or wrong. Meanwhile on the internet the combined paging/segmentation is described using one scheme only. I can't figure out why in my coursebook there are two schemes for this. Any help would be deeply appreciated. So,after vigorously searching

Segment size in x86 real mode

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I have one doubt regarding the size of segments in real mode as they can't be more than 64K but can be less than that. My question is how these segment size and base address is initialized ? Like there are GDT's and LDT's in protected mode. Real mode segments can also overlapped,disjoint or adjacent. Like BIOS has some reserved area for specific things like boot code,video buffer etc does assembly programs need to do something like that ? In real mode segmented addresses are hardwired into memory. To get a physical address you can use this equation: physical address = segment * 16 + offset

Detail about MSR_GS_BASE in linux x86 64

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问题 I tried to figure out the details of MACRO current in Linux kernel. The final assembly code of current is: movq %%gs:0xb000,%0 The code above can work! But when I print the %%gs, its value is 0, so the %%gs points to the first item of GDT NULL!!?? How it works? mov %%gs, %0 Instead, the base of gs is in MSR_GS_BASE, and the current can be replaced like: /*0xb000 is the offset of per_cpu__current_task*/ cur_task = (unsigned long*)(x86_rdmsr64(MSR_GS_BASE) + 0xb000); println("cur_task:%p",*cur

Differences or similarities between Segmented paging and Paged segmentation?

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问题 I was studying combined paging/segmentation systems and in my book there were two approaches to this : 1.paged segmentation 2.segmented paging I could not make out the difference between the two. I think in paged segmentation the segment is divided into pages and in segmented paging the pages are divided into segments, though I don't know if I am right or wrong. Meanwhile on the internet the combined paging/segmentation is described using one scheme only. I can't figure out why in my

What is the purpose of segment registers in x86 protected mode?

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问题 I need to modify some dll, but i don't know, what excatly does segment registers ( DS , SS , ...) in protected mode. I learned in school about real 16-bit mode, where segment registers multiply by 16 plus offset in normal register gives effective address in physical memory. In protected mode, there is some flat memory model and virtual memory, where each process "has" 4GB memory, so if registers have 32-bit, then i can address each byte of virtual memory only by "offset" register. So which