VHDL clocked LED Sequence Part 2
问题 I have to write a program that changes an LED sequence at each clock pulse for one sequence. library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.numeric_std.all; entity REG_LED is PORT(CLK: IN std_logic; -- CLK input LEDS: Out std_logic_vector (4 downto 0):= "11111"); -- initialise output End REG_LED; ARCHITECTURE behavioral OF REG_LED IS SIGNAL Temp: std_logic_vector (3 downto 0):= "0000"; -- initailise comparison signal BEGIN CLK_Process: PROCESS (CLK) --