irq

What's the most accurate way of measuring elapsed time in a modern PC?

一笑奈何 提交于 2019-12-06 14:11:55
I know I can use IRQ0, which is the system timer, but this is based on a 14.31818MHz clock, right? Is there anything offering greater precision? Thanks. Edit: Does anyone know what the Windows function QueryPerformanceCounter uses? "Precision" and "accuracy" mean different things. "The Earth's circumference is 40000.000000000 km" is precise, but not accurate. It's a bit more complicated with clocks: Resolution: time between ticks, or period of ticks. (You could probably call it "precision", but I think "resolution" has a more obvious meaning.) Skew: relative difference between nominal and

How an I2c read as well as write operation in “handler function” of request_threaded_irq affects the driver as a whole.?

时光怂恿深爱的人放手 提交于 2019-12-05 02:38:31
问题 I have a driver code with handler function and thread function of request_threaded_irq similar to this: irq-handler fn() { /*disable device interrupt*/ i2c read from register; set disable bit to client-device-interrupt i2c write back; return IRQ_WAKe_THREAD; } irq-thread fn() { i2c read from register; .... .... /*enable device interrupt*/ i2c read from register; set enable bit to client-device-interrupt i2c write back; /*Rest of the operation*/ .......... .......... return IRQ_HANDLED; } I

Retrieving return address of an exception on ARM Cortex M0

让人想犯罪 __ 提交于 2019-12-04 10:12:48
I am trying to retrieve the return address of an IRQ handler in my code. My aim is to save the value of the PC just before the watchdog timer expires and before the reset for debug purposes, using WDT_IRQHandler(). I am also testing this approach with other IRQs to check if I grasped the idea. But it seems I haven't. I have read the documentation available. I understood that when an exception happens, 8 registers are pushed to the stack: R0, R1, R2, R3, R12, LR, PC and XPSR. I have also read that the stack is automatically double word aligned. So in my mind, retrieving the return address is as

How an I2c read as well as write operation in “handler function” of request_threaded_irq affects the driver as a whole.?

做~自己de王妃 提交于 2019-12-03 20:22:39
I have a driver code with handler function and thread function of request_threaded_irq similar to this: irq-handler fn() { /*disable device interrupt*/ i2c read from register; set disable bit to client-device-interrupt i2c write back; return IRQ_WAKe_THREAD; } irq-thread fn() { i2c read from register; .... .... /*enable device interrupt*/ i2c read from register; set enable bit to client-device-interrupt i2c write back; /*Rest of the operation*/ .......... .......... return IRQ_HANDLED; } I have few question with respect to above implentation. Will 2 i2c operation in "handler fn" takes

request_threaded_irq() is used in the driver why not request_irq()? What are the differences between two?

穿精又带淫゛_ 提交于 2019-12-03 16:21:15
I posted this is the thread which discussed about request_threaded_irq but I did not get any reply. So I am posting it freshly. I am working on a touchscreen driver for capacitive touchscree. It used request_threaded_irq() call instead of request_irq(). I could not understand the basic difference betweeen two. It says :- Name request_threaded_irq — allocate an interrupt line Synopsis int request_threaded_irq (unsigned int irq, irq_handler_t handler,irq_handler_t thread_fn, unsigned long irqflags, const char *devname, void *dev_id); Arguments irq - Interrupt line to allocate handler - Function

How many instructions does Linux kernel need in order to handle an interrupt on an arm cortex A9?

送分小仙女□ 提交于 2019-12-01 05:40:10
问题 I would like to estimate the amount of opcodes it takes a ARM cortex A9 single core to handle an IRQ. Assuming I work with Linux kernel 3.4 , how many opcodes it takes to call the irq and execute the irq_handler ? 回答1: You question is related how to calculate the interrupt latency of Linux. At least you might be interested in how long it takes before your interrupt even starts. We will ignore this aspect of irqs here. A simple way is to toggle a GPIO and use a scope to measure the interrupt.

What is the irq latency due to the operating system?

时光总嘲笑我的痴心妄想 提交于 2019-11-30 17:17:48
问题 How can I estimate the irq latency on ARM processor? What is the definition for irq latency? 回答1: Mats and Nemanja give some good information on interrupt latency. There are two is one more issue I would add, to the three given by Mats. Other simultaneous/near simultaneous interrupts. OS latency added due to masking interrupts. Edit: This is in Mats answer, just not explained as much. If a single core is processing interrupts, then when multiple interrupts occur at the same time, usually

what is chained irq in linux, when are they need to used?

别说谁变了你拦得住时间么 提交于 2019-11-29 09:33:10
问题 What is chained IRQ ? What does chained_irq_enter and chained_irq_exit do, because after an interrupt is arised the IRQ line is disabled, but chained_irq_enter is calling functions related to masking interrupts. If the line is already disabled why to mask the interrupt ? 回答1: what is chained irq ? There are two approaches how to call interrupt handlers for child devices in IRQ handler of parent (interrupt controller) device. Chained interrupts: "chained" means that those interrupts are just

How does linux kernel wake idle processor up when new task created?

夙愿已清 提交于 2019-11-29 07:24:36
I'm newbie on Linux Kernel. Currently, I looked into idle codes and had a quesition. When processor doesn't have any taks in their own runqueue then it may go into idle mode, specific WFI(wating for interrupt). (All I mentioned is about ARM architecture not X86. So something is wrong for X86.) After staying in WFI state, maybe other processor(not idle) want to spread their task to this, idle processor(by load balance). At that time a busy processor makes task imigrated. In my point of view, when the task is imigrated, the idle processor should wake up immidiatley to process the task. right?

Keyboard IRQ within an x86 kernel

一个人想着一个人 提交于 2019-11-26 21:22:16
问题 I'm trying to program a very simple kernel for learning purposes. After reading a bunch of articles about the PIC and IRQs in the x86 architecture, I've figured out that IRQ1 is the keyboard handler. I'm using the following code to print the keys being pressed: #include "port_io.h" #define IDT_SIZE 256 #define PIC_1_CTRL 0x20 #define PIC_2_CTRL 0xA0 #define PIC_1_DATA 0x21 #define PIC_2_DATA 0xA1 void keyboard_handler(); void load_idt(void*); struct idt_entry { unsigned short int offset