intel

问题 Each thread has its own stack to store local variables. But stacks are also used to store return addresses when calling a function. In x86 assembly, esp points to the most-recently allocated end of the stack. Today, most CPUs have stack grow negatively. This behavior enables arbitrary code execution by overflowing the buffer and overwriting the saved return address. If the stack was to grow positively, such attacks would not be feasible. Is it safer to have the call stack grow upwards? Why

问题 I have an Intel CPU with 4 HT cores (8 logical CPUs) and I built two simple processes. The first one: int main() { for(int i=0;i<1000000;++i) for(int j=0;j<100000;++j); } The second one: int main() { while(1); } Both are compiled with gcc without special options. (I.e. with the default of -O0 : no optimization debug mode, keeping variables in memory instead of registers.) When I run the first one on the first logical CPU (CPU0), and when the other logical CPUs have a load charge near 0%, the

问题 I have an Intel CPU with 4 HT cores (8 logical CPUs) and I built two simple processes. The first one: int main() { for(int i=0;i<1000000;++i) for(int j=0;j<100000;++j); } The second one: int main() { while(1); } Both are compiled with gcc without special options. (I.e. with the default of -O0 : no optimization debug mode, keeping variables in memory instead of registers.) When I run the first one on the first logical CPU (CPU0), and when the other logical CPUs have a load charge near 0%, the

问题 I am trying to use cpu-frequency scaling to set cpu frequency. In my system, only powersave , performance frequency-scaling-governor supported. It was explained in other document, by default, intel_pstate is enabled and it only supports powersave , performance frequency-scaling-governor and solution is disable intel_pstate. So I tried to disable as below sudo nano /etc/default/grub GRUB_CMDLINE_LINUX_DEFAULT="intel_pstate=disable" sudo update-grub on reboot, intel_pstate is enabled. so ,

问题 In what I've learned so far about segmentation: A virtual address contains a segment selector and an offset The segment selector is used in conjunction with the GDTR to find the linear address of the segment descriptor The segment descriptor houses information regarding the chosen segment, including its linear address So, my questions are: Based on what I've read, the virtual address is loaded into the segment register, and then somehow the translation is continued from there. What happens to

问题 Is there anyway I can flush iCache in x86 architecture ? Like WBINVD which will invalidate and flush all the cachelines in data cache. 回答1: According to the docs, wbinvd flushes and invalidates all caches , not just data and unified caches. (I'm not sure if that includes TLBs if you ran it with paging enabled.) What are you trying to test? L1i miss / L2 hit for code-fetch? I don't think it's possible to purposely flush just the I-cache without also flushing all levels of cache. You could

问题 I am trying to convert a trained model in tensorflow to Open VINO Intermediate Representation. I have a model of the form given below class Conv3DModel(tf.keras.Model): def __init__(self): super(Conv3DModel, self).__init__() # Convolutions self.conv1 = tf.compat.v2.keras.layers.Conv3D(32, (3, 3, 3), activation='relu', name="conv1", data_format='channels_last') self.pool1 = tf.keras.layers.MaxPool3D(pool_size=(2, 2, 2), data_format='channels_last') self.conv2 = tf.compat.v2.keras.layers.Conv3D

问题 I've searched all over the web, but I couldn't find what the "fh" means in the following instruction and eax, 38fh . I know that "h" stands for hexadecimal and "d" for decimal, but I've never seen fh before. 回答1: If an Intel assembler (ie. MASM ) token starts with a number (0 to 9) then it is assumed to be that the entire token is a value. If the value ends with an h the assembler assumes it is H exadecimal. In your case 38fh starts with a number so it is assumed to be a value. The end of the

问题 I believe it's because I've updated my SDK and tools, without updating HAXM. Unfortunately I don't have admin rights on this machine and need help figuring out how to get the emulator working without updating HAXM. Any ideas? Downgrading the SDK? Maybe getting the new HAXM is the only option to progress forward? 9:55 AM Emulator: Warning: requested RAM 1024M too high for your system. Reducing to maximum supported size 0M 9:55 AM Emulator: Process finished with exit code 0 回答1: Reinstalled

问题 I believe it's because I've updated my SDK and tools, without updating HAXM. Unfortunately I don't have admin rights on this machine and need help figuring out how to get the emulator working without updating HAXM. Any ideas? Downgrading the SDK? Maybe getting the new HAXM is the only option to progress forward? 9:55 AM Emulator: Warning: requested RAM 1024M too high for your system. Reducing to maximum supported size 0M 9:55 AM Emulator: Process finished with exit code 0 回答1: Reinstalled