fma

Code1: vzeroall mov rcx, 1000000 startLabel1: vfmadd231ps ymm0, ymm0, ymm0 vfmadd231ps ymm1, ymm1, ymm1 vfmadd231ps ymm2, ymm2, ymm2 vfmadd231ps ymm3, ymm3, ymm3 vfmadd231ps ymm4, ymm4, ymm4 vfmadd231ps ymm5, ymm5, ymm5 vfmadd231ps ymm6, ymm6, ymm6 vfmadd231ps ymm7, ymm7, ymm7 vfmadd231ps ymm8, ymm8, ymm8 vfmadd231ps ymm9, ymm9, ymm9 vpaddd ymm10, ymm10, ymm10 vpaddd ymm11, ymm11, ymm11 vpaddd ymm12, ymm12, ymm12 vpaddd ymm13, ymm13, ymm13 vpaddd ymm14, ymm14, ymm14 dec rcx jnz startLabel1 Code2: vzeroall mov rcx, 1000000 startLabel2: vmulps ymm0, ymm0, ymm0 vmulps ymm1, ymm1, ymm1 vmulps ymm2

How can I disable auto-vectorization with AVX and FMA instructions? I would still prefer the compiler to employ SSE and SSE2 automatically, but not FMA and AVX. My code that uses AVX checks for its availability, but GCC doesn't do it when auto-vectorizing. So if I compile with -mfma and run the code on any CPU prior to Haswell I get SIGILL . How to solve this issue? What you want to do is compile different object files for each instruction set you are targeting. Then create a cpu dispatcher which asks CPUID for the available instruction set and then jumps to the appropriate version of the

With GCC 5.3 the following code compield with -O3 -fma float mul_add(float a, float b, float c) { return a*b + c; } produces the following assembly vfmadd132ss %xmm1, %xmm2, %xmm0 ret I noticed GCC doing this with -O3 already in GCC 4.8 . Clang 3.7 with -O3 -mfma produces vmulss %xmm1, %xmm0, %xmm0 vaddss %xmm2, %xmm0, %xmm0 retq but Clang 3.7 with -Ofast -mfma produces the same code as GCC with -O3 fast . I am surprised that GCC does with -O3 because from this answer it says The compiler is not allowed to fuse a separated add and multiply unless you allow for a relaxed floating-point model.

When I first got a Haswell processor I tried implementing FMA to determine the Mandelbrot set. The main algorithm is this: intn = 0; for(int32_t i=0; i<maxiter; i++) { floatn x2 = square(x), y2 = square(y); //square(x) = x*x floatn r2 = x2 + y2; booln mask = r2<cut; //booln is in the float domain non integer domain if(!horizontal_or(mask)) break; //_mm256_testz_pd(mask) n -= mask floatn t = x*y; mul2(t); //mul2(t): t*=2 x = x2 - y2 + cx; y = t + cy; } This determines if n pixels are in the Mandelbrot set. So for double floating point it runs over 4 pixels ( floatn = __m256d , intn = __m256i ).

I have learned that some Intel/AMD CPUs can do simultanous multiply and add with SSE/AVX: FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2 . I like to know how to do this best in code and I also want to know how it's done internally in the CPU. I mean with the super-scalar architecture. Let's say I want to do a long sum such as the following in SSE: //sum = a1*b1 + a2*b2 + a3*b3 +... where a is a scalar and b is a SIMD vector (e.g. from matrix multiplication) sum = _mm_set1_ps(0.0f); a1 = _mm_set1_ps(a[0]); b1 = _mm_load_ps(&b[0]); sum = _mm_add_ps(sum, _mm_mul_ps(a1, b1)); a2 = _mm