extended-precision

Properties of 80-bit extended precision computations starting from double precision arguments

坚强是说给别人听的谎言 提交于 2019-11-27 07:38:46
问题 Here are two implementations of interpolation functions. Argument u1 is always between 0. and 1. . #include <stdio.h> double interpol_64(double u1, double u2, double u3) { return u2 * (1.0 - u1) + u1 * u3; } double interpol_80(double u1, double u2, double u3) { return u2 * (1.0 - (long double)u1) + u1 * (long double)u3; } int main() { double y64,y80,u1,u2,u3; u1 = 0.025; u2 = 0.195; u3 = 0.195; y64 = interpol_64(u1, u2, u3); y80 = interpol_80(u1, u2, u3); printf("u2: %a\ny64:%a\ny80:%a\n", u2

practical BigNum AVX/SSE possible?

房东的猫 提交于 2019-11-27 02:14:41
SSE/AVX registers could be viewed as integer or floating point BigNums. That is, one could neglect that there exist lanes at all. Does there exist an easy way to exploit this point of view and use these registers as BigNums either singly or combined? I ask because from what little I've seen of BigNum libraries, they almost universally store and do arithmetic on arrays, not on SSE/AVX registers. Portability? Example: Say you store the contents of a SSE register as a key in a std::set , you could compare these contents as a BigNum. I think it may be possible to implement BigNum with SIMD

Does gcc support 128-bit int on amd64? [duplicate]

一笑奈何 提交于 2019-11-26 21:28:35
问题 This question already has an answer here: Is there a 128 bit integer in gcc? 3 answers Does gcc support 128-bit int on amd64? How to define it? How to use scanf/printf to read/write it? 回答1: GCC supports built-in __int128 and unsigned __int128 types (on 64-bit platforms only), but it looks like formatting support for 128-bit integers is less common in libc. Note: <stdint.h> defines __int128_t and __uint128_t on versions before gcc4.6. See also Is there a 128 bit integer in gcc? for a table of

Is there a document describing how Clang handles excess floating-point precision?

丶灬走出姿态 提交于 2019-11-26 16:10:51
问题 It is nearly impossible(*) to provide strict IEEE 754 semantics at reasonable cost when the only floating-point instructions one is allowed to used are the 387 ones. It is particularly hard when one wishes to keep the FPU working on the full 64-bit significand so that the long double type is available for extended precision. The usual “solution” is to do intermediate computations at the only available precision, and to convert to the lower precision at more or less well-defined occasions.

practical BigNum AVX/SSE possible?

。_饼干妹妹 提交于 2019-11-26 09:12:45
问题 SSE/AVX registers could be viewed as integer or floating point BigNums. That is, one could neglect that there exist lanes at all. Does there exist an easy way to exploit this point of view and use these registers as BigNums either singly or combined? I ask because from what little I\'ve seen of BigNum libraries, they almost universally store and do arithmetic on arrays, not on SSE/AVX registers. Portability? Example: Say you store the contents of a SSE register as a key in a std::set , you