cpu

多进程 VS 多线程 VS 线程池 VS EventLoop

天涯浪子 提交于 2020-04-30 19:58:16
多进程 VS 多线程 VS 线程池 VS EventLoop 在现在的编程过程中,经常听到多进程,多线程,线程池,EventLoop 的概念,选择一个正确的驱动模型,有助于提升代码的性能。 注:本文仅仅讨论并发的情况。 进程和线程 进程:操作系统中 资源管理对象 ,管理虚拟内存,文件句柄,线程等资源,但是 进程不是执行单元 。 线程: 具体的执行单元 。CPU是实际的物理执行单元,通过 寄存器 可以控制CPU执行的代码以及状态。而线程就是包含了一个任务的CPU上下文(寄存器),任务状态(就绪|阻塞|运行),所属用户等信息的对象。操作系统接收到时间中断(INT)后, 通过轮转线程中的CPU上下文(寄存器)信息,实现了多任务的轮转 。 多进程 多进程:针对并发请求,一个请求开启一个进程进行处理。早起CGI就是这么干的。 代表:早期PHP,CGI类 优点: 一个业务进程奔溃不影响另外一个业务进程,从操作系统层面上隔离业务执行 如果进程采用Socket之类的RPC调用,那么非常容易部署到网络环境上 缺点: RPC调用比较难以编写 频繁的开启和关闭进程,性能比较差 不允许内存共享(排除内核支持情况) 多线程 多线程:针对不同的业务逻辑,并发的开启多个线程进行执行。 代表:早期 Tomcat Bio模型 优点: 内存是共享的 编写并发模型比较方便 有效的利用多核CPU 缺点: 并发量过大的时候

How do interrupts work in multi-core system?

核能气质少年 提交于 2020-04-08 10:37:43
问题 I want to write code for interrupts of the buttons on Raspberry pi 2. This board uses QUAD Core Broadcom BCM2836 CPU (ARM architecture). That mean, only one CPU is on this board( Raspberry pi 2 ). But I don't know how do interrupts in multi-core system. I wonder whether interrupt line is connected to each core or one CPU. So, I found the paragraph below via Google. Interrupts on multi-core systems On a multi-core system, each interrupt is directed to one (and only one) CPU, although it doesn

How to find the Number of physical CPU Cores (not logical SMT hyperthreads) via .NET Core?

只谈情不闲聊 提交于 2020-03-22 08:48:25
问题 I want to detect the number of real physical cores, not logical cores, for workloads that scale negatively when more threads compete for private per-core caches, and/or have high enough IPC that running more than one logical thread per core doesn't increase throughput by more than the increase in threading overhead, especially for problems that don't scale perfectly to lots of cores. Or to put it another way, the number of threads that can run without any of them competing for execution

How to find the Number of physical CPU Cores (not logical SMT hyperthreads) via .NET Core?

妖精的绣舞 提交于 2020-03-22 08:48:11
问题 I want to detect the number of real physical cores, not logical cores, for workloads that scale negatively when more threads compete for private per-core caches, and/or have high enough IPC that running more than one logical thread per core doesn't increase throughput by more than the increase in threading overhead, especially for problems that don't scale perfectly to lots of cores. Or to put it another way, the number of threads that can run without any of them competing for execution

I'm looking to improve or request my current delay / sleep method. c++

别说谁变了你拦得住时间么 提交于 2020-03-05 03:10:17
问题 Currently I am coding a project that requires precise delay times over a number of computers. Currently this is the code I am using I found it on a forum. This is the code below. { LONGLONG timerResolution; LONGLONG wantedTime; LONGLONG currentTime; QueryPerformanceFrequency((LARGE_INTEGER*)&timerResolution); timerResolution /= 1000; QueryPerformanceCounter((LARGE_INTEGER*)&currentTime); wantedTime = currentTime / timerResolution + ms; currentTime = 0; while (currentTime < wantedTime) {

how does the processor read memory?

江枫思渺然 提交于 2020-02-15 18:06:24
问题 I'm trying to re-implement malloc and I need to understand the purpose of the alignment. As I understand it, if the memory is aligned, the code will be executed faster because the processor won't have to take an extra step to recover the bits of memory that are cut. I think I understand that a 64-bit processor reads 64-bit by 64-bit memory. Now, let's imagine that I have a structure with in order (without padding): a char, a short, a char, and an int. Why will the short be misaligned? We have

how does the processor read memory?

不羁的心 提交于 2020-02-15 18:05:40
问题 I'm trying to re-implement malloc and I need to understand the purpose of the alignment. As I understand it, if the memory is aligned, the code will be executed faster because the processor won't have to take an extra step to recover the bits of memory that are cut. I think I understand that a 64-bit processor reads 64-bit by 64-bit memory. Now, let's imagine that I have a structure with in order (without padding): a char, a short, a char, and an int. Why will the short be misaligned? We have

Your CPU does not support VT-x

╄→尐↘猪︶ㄣ 提交于 2020-02-01 05:30:09
问题 I have created AVD, but when I try to run android program, it is showing an error Your CPU does not support VT-x I enabled virtualization technology in BIOS, but still this error comes up when I try to run my android program. 回答1: According to Android Documentation, to run an emulator the development system's CPU should support one of the following virtualization extensions technologies: Intel Virtualization Technology (VT, VT-x, vmx) AMD Virtualization (AMD-V, SVM) -- only supported for

Pinning a thread to a core in a cpuset through C

我与影子孤独终老i 提交于 2020-01-31 07:59:11
问题 I have /cgroup/cpuset/set1. set1 has 2-5,8. I want to bind a process to that cpuset and then pin a thread in that process to, say, core 4. The name of the cpuset and the thread name and the core to which I should bind the thread is in m config file. Are there any C APIs to parse cpuset? What is the correct way to achieve the pinning using C code? 回答1: Take a look at the pthread_setaffinity_np and pthread_getaffinity_np functions. Example: #define _GNU_SOURCE #include <pthread.h> #include

What is the equivalent of /proc/cpuinfo on FreeBSD v8.1?

扶醉桌前 提交于 2020-01-31 06:21:16
问题 What is the equivalent of Linux's /proc/cpuinfo on FreeBSD v8.1? My application reads /proc/cpuinfo and saves the information in the log file, what could I do to get similar information logged on FreeBSD? A sample /proc/cpuinfo looks like this: processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 23 model name : Intel(R) Xeon(R) CPU E5420 @ 2.50GHz stepping : 8 cpu MHz : 2499.015 cache size : 6144 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes