arm64

Differences between arm64 and aarch64

。_饼干妹妹 提交于 2019-12-20 08:40:55
问题 I have two "unlocked" devices, an iPad mini 3, and a Galaxy Edge 6, both endowed with a terminal and a minimalistic set of unix commands. I thought both devices have arm64 processors but when I ran uname -a on both devices I got the following : for the iPad mini 3 : xxxxs-iPad:/var/mobile root# uname -a Darwin xxxx-iPad 14.0.0 Darwin Kernel Version 14.0.0: Wed Jun 24 00:50:15 PDT 2015; root:xnu-2784.30.7-30/RELEASE_ARM64_S5L8960X iPad4, **arm64**, J85mAP for the Samsung Galaxy s6 Edge : u0

What gdb commands should I use to narrow down where in label 'main' did I get the segmentation fault?

坚强是说给别人听的谎言 提交于 2019-12-20 07:37:47
问题 Here's my assembly code and my main subroutine. Here are my macros and constants: .text fmt: .string "x \t\t ln(x)\n" sfmt: .string "%.10lf \t %.10lf\n" error: .string "Error" filename: .string "input.bin" .data LIM: .double 0r1.0E-13 zero: .double 0r0.0 one: .double 0r1.0 half: .double 0r0.5 define(i_r,w19) define(j_r,w20) define(n_r,w21) define(fd_r,w22) define(ln_x,d8) define(cur_term,d24) define(n_read,x25) define(x_j,d26) BUF_SIZE = 98*8 AT_FDCWD = -100 O_RDONLY = 0 buf_s = 16 .bss x_arr

iOS ARM64 Syscalls

给你一囗甜甜゛ 提交于 2019-12-20 06:33:46
问题 I am learning more about shellcode and making syscalls in arm64 on iOS devices. The device I am testing on is iPhone 6S. I got the list of syscalls from this link (https://github.com/radare/radare2/blob/master/libr/include/sflib/darwin-arm-64/ios-syscalls.txt). I learnt that x8 is used for putting the syscall number for arm64 from here (http://arm.ninja/2016/03/07/decoding-syscalls-in-arm64/). I figured the various registers used to pass in parameters for arm64 should be the same as arm so I

PUSH {lr} and POP {lr} in ARM Arch64

允我心安 提交于 2019-12-20 02:54:16
问题 What is the equivalent instruction for PUSH{lr} and POP{lr} in ARM Arch64 instruction set . Is STR X30, [SP, #8] correct ? could you please explain the concept of maintaining stack alignment ? I am relatively new to ARMv8 so excuse me. 回答1: If you ask the C compiler to generate an assembly language listing from your source, you'll see how it handles pushing data on the stack for ARMv8. This might not be the only way to do it, but GCC does it this way: sub sp, sp, #32 \\ Open up some temp

ARM64 using gas on iOS?

放肆的年华 提交于 2019-12-19 09:44:27
问题 I've got some assembly functions I've ported to 64-bit ARM, and they work fine on Android, but when I tried to compile the same files in Xcode, I discovered that clang uses a different syntax (different from the official ARM documentation). I've found some scripts which convert a source file from one format to the other, but this is not the ideal solution (and it seems these scripts don't work when the source files contain preprocessor defines). Can I simply use gas in Xcode, or configure

how to use aarch64-linux-gnu-objdump to disassemble V7 mode instructions (A32,T32)

依然范特西╮ 提交于 2019-12-18 05:06:11
问题 Im using aarch64-linux-gnu-objdump to disassemble part of a program for ARM v8. It works well for V8 64 bit instructions, but fails when the mode is changed to V7 instruction set(A32) - the code starts as V8 instruction set, switches to A32 ( AArch32 execution state) and than to T32 - thumb instruction set. how can I disassemble the A32 and T32 instructions? Do I need to break the code to parts when the mode switches, so that i have separate instruction mode blocks? any help would be

qemu-system-aarch64 entering el1 when emulating a53 power up

大兔子大兔子 提交于 2019-12-17 17:10:45
问题 I have downloaded latest qemu Windows version then run below line qemu-system-aarch64 -M virt,gic_version=3 -cpu cortex-a53 -smp 2 -nographic -m 2048 -kernel mybaremetal.axf -s -S to emulate a dual core cortex-a53, and I can use an aarch64 gdb client to connect to it, at the entry of mybaremetal.axf, I checked the exception level of excution by: mrs x1, CurrentEL I always get value 4 in x1, but value 0xc is expected here as in ARM document, it says: On powerup and on reset, the processor

Can arm64 cache be flushed from EL0?

核能气质少年 提交于 2019-12-13 14:30:01
问题 I'm reading an academic paper which states "The ARM architecture also includes instructions to evict cache lines. However, these instructions can only be used when the processor is in an elevated privilege mode." Is that true? I've been searching the ARM documentation, and I don't see anything that suggests I can't do this from EL0 under "ARM Cortex-A Series Programmer’s Guide for ARMv8-A" chapter 11.5 http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/BABJDBHI.html 回答1:

Compiling libical for armv7 and arm64 with cmake

十年热恋 提交于 2019-12-13 02:05:21
问题 I've gone through the various solutions of compiling libical v1.0 for armv7, however the latest libical library available on github seems to have moved to cmake: https://github.com/libical/libical Can someone please guide me as to what I should be doing to get this to compile for iOS and Mac (one fat static library)? I've been able to compile it for the Mac but don't know how to do the same for armv7 and arm64. Thanks! 回答1: I tried everything from ios-toolchain for cmake to writing a build

Memory offsets in inline assembly

橙三吉。 提交于 2019-12-12 21:15:13
问题 In A64 assembler, there are different ways to specify addresses. /* [base{,#0}] Simple register (exclusive) - Immediate Offset [base{,#imm}] Offset - Immediate Offset [base,Xm{,LSL #imm}] Offset - Register Offset [base,Wm,(S|U)XTW {#imm}] Offset - Extended Register Offset [base,#imm]! Pre-indexed - Immediate Offset [base],#imm Post-indexed - Immediate Offset label PC-relative (literal) load - Immediate Offset */ I would like to use "Offset - Immediate Offset" in inline assembler. __asm__("ldp