How to use 3-input logic gates in vhdl?

问题

I am just learning vhdl, and am trying to use a 3-input nand gate. The code I have is:

G => (A nand B nand C) after 3 ns;

but this does not compile.

回答1:

I'm not an expert on VHDL but I think you have a couple of mistakes there - it should probably be:

G <= not (A and B and C) after 3 ns;

i.e. the assignment is in the wrong direction and I'm not sure that nand commutes in the way that you need it to for 3 inputs, hence the use of and for the inputs and then not to invert the output.

回答2:

Oh I think I may know.

G <= (A nand B nand C);

You have the assignment operator sign reversed, yes?

Really delayed edit:

VHDL will not compile with the A nand B nand C syntax presented above, this gives a syntax error. Best to do what Paul suggests and pull the not out in front of the logic.

来源：https://stackoverflow.com/questions/7984137/how-to-use-3-input-logic-gates-in-vhdl