问题
I am aware that inferred latches occur when not every possible path is defined, but I have made considerations to avoid this in my process:
The signal is:
signal BothButtons : std_logic_vector (1 downto 0) ;
The process is:
Signaling : process(button0, button1)
begin
if (button0= '0') AND (button1 = '0') then
BothButtons <= "00";
elsif (button0= '0') AND (button1 = '1') then
BothButtons <= "01";
elsif (button0= '1') AND (button1 = '0') then
BothButtons <= "10";
elsif (button0= '1') AND (button1 = '1') then
BothButtons <= "11";
end if;
end process;
This is driving me crazy, any help is appreciated, maybe I lack an understanding of something really simple!
The error is:
Warning (10631): VHDL Process Statement warning at swDisplay.vhd(28): inferring latch(es) for signal or variable "BothButtons", which holds its previous value in one or more paths through the process
As far as I am aware I am not assigning to the signal two values at the same time, rather it is in receiving values in different situations?
this time I am using that previous signal to drive the output of another process but another latch is appearing within it, this time I did take into account any other value and place an "else" statement to take care of that but no luck:
Counting : process(BothButtons)
variable count0 : integer range 0 to 9; -- to hold the counter value
begin
if BothButtons = "00" then
count0 := 0;
elsif BothButtons = "01" then
count0 := count0 + 1;
elsif BothButtons = "10" then
count0 := count0;
elsif BothButtons = "11" then
count0 := count0;
else
count0 := 0;
end if;
For those of you who are wondering, yes this is part of an academic exercise!
回答1:
What happens if button0 is neither '0' nor '1'? There's your latch. (ditto button1) Even 'H'
and 'L'
will confuse it, even though these have a clear meaning to you or me...
Now what do you need that BothButtons <= button0 & button1;
doesn't do? (I may have misunderstood the problem you are having)
回答2:
You have latches because you have a process with memory without a clock.
In the first example you give you just need an else
in the end of the if-case. Otherwise it is forced to use a previous value, which requires that it has some memory of this previous value. Memory requires latches or flip-flops - and without a clock it is forced to use latches.
In the second example the lines count0 := count0 + 1;
and count0 := count0;
uses the value from a previous iteration of the process. This requires memory. And memory without a clock gives you latches.
来源:https://stackoverflow.com/questions/33279873/why-am-getting-inferred-latches