问题
I am writing some firmware code running in the System Managemnt Mode (SMM) on an Intel platform. I want to fully understand how my SMI handler get started.
I read from the Intel Manual that:
The only way to enter SMM is by signaling an SMI through the SMI# pin on the processor or through an SMI message received through the APIC bus.
And I also read that a synchronous SMI can be triggered by writing to an I/O port.
My understanding is like this:
SMM is just a special operating mode of a processor. Based on my previous experience, whenever I want to change the state of a processor, such as enabling paging or enterring protected mode, I usually modify the control register or Model Specific Registers (MSR). These registers are part of the processor and I can buy it that some internal magic happens if I change some bits of them.
But what does the above I/O port mean? Where does this port pointing to? If writing to a port can trigger a SMI as well, how is the port-writing-approach related to the canonical ways of SMI# pin and the SMI message? And is this port number changeable?
来源：https://stackoverflow.com/questions/44511643/different-ways-to-to-trigger-a-smi-for-a-processor