How to run regression using makefile

问题

I have tcsh shell. I want to compile once which is VCS and then run multiple testcases using SIMV. Earlier for single test VCS = vcs -sverilog -timescale=1ns/1ps \ +acc +vpi .. and SIMV = ./simv +UVM_VERBOSITY=$(UVM_VERBOSITY) +UVM_TESTNAME=$(TESTNAME) ${vcs_waves_cmd} -l $(TESTNAME).log were defined as constants.

I have to replace $(TESTNAME) by looping on an array.I tried as below by switching to bash but ultimately it is causing other failures such as make cleannot working.

TESTS = ext_reg_write_read reg_write_read 
regress: $(TESTS) 
  $(VCS)\ 
  for t in $(TESTS); do\
./simv +UVM_VERBOSITY=$(UVM_VERBOSITY) +UVM_TESTNAME=$$t ${vcs_waves_cmd} -l $$t.log;\ 
done

Also I would like to add export shell command export SHELL = /bin/csh -f

My question is similar to following – Implementing `make check` or `make test`

I have used @J. C. Salomon 's answer to make this code

回答1:

The problem is with export SHELL = /bin/csh -f which I was changing to export SHELL = /bin/bash -f.

But finally SHELL := /bin/bash works as answered in How can I use Bash syntax in Makefile targets? by @derobert

来源：https://stackoverflow.com/questions/26806832/how-to-run-regression-using-makefile