x86

问题 I was reading the Intel instruction set guide 64-ia-32 guide to get an idea on memory fences. My question is that for an example with SFENCE, in order to make sure that all store operations are globally visible, does the multi-core CPU parks all the threads even running on other cores till the cache coherence achieved ? 回答1: Barriers don't make other threads/cores wait. They make some operations in the current thread wait , depending on what kind of barrier it is. Out-of-order execution of

问题 According to this https://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html, a released store is implemented as MOV (into memory) on x86 (including x86-64). According to his http://en.cppreference.com/w/cpp/atomic/memory_order memory_order_release : A store operation with this memory order performs the release operation: no memory accesses in the current thread can be reordered after this store. This ensures that all writes in the current thread are visible in other threads that acquire or the

问题 According to this https://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html, a released store is implemented as MOV (into memory) on x86 (including x86-64). According to his http://en.cppreference.com/w/cpp/atomic/memory_order memory_order_release : A store operation with this memory order performs the release operation: no memory accesses in the current thread can be reordered after this store. This ensures that all writes in the current thread are visible in other threads that acquire or the

问题 According to this https://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html, a released store is implemented as MOV (into memory) on x86 (including x86-64). According to his http://en.cppreference.com/w/cpp/atomic/memory_order memory_order_release : A store operation with this memory order performs the release operation: no memory accesses in the current thread can be reordered after this store. This ensures that all writes in the current thread are visible in other threads that acquire or the

问题 This question already has answers here : Incomprehensible behavior of the CF flag (2 answers) Why is the Carry Flag set during a subtraction when zero is the minuend? (2 answers) Assembly x86-64 setting carry flag for sub instruction (1 answer) Why does CMP (compare) sometimes sets a Carry Flag in 8086 assembly? (4 answers) Closed last month . I try to compare the next expressions: 1) mov al, 4 mov bl, 12 sub al, bl ; CF == 1 0000 0100 (4) + 1111 0100 (-12) = 1111 1000 (-8 == 248) 2) mov al,

问题 I have made a small program in assembly language which is executing fine. I also have the commands to execute it but I don't know how to make a makefile to automate the same. The command I used is: nasm -f bin boot2.asm -o boot2.bin && qemu-system-x86_64 -fda boot2.bin How do I make a makefile for the same? 回答1: Simple version: all: build run build: boot2.bin boot2.bin: boot2.asm nasm -f bin boot2.asm -o boot2.bin run: boot2.bin qemu-system-x86_64 -fda boot2.bin clean: -rm boot2.bin 来源： https

问题 I want to add two numbers that have 12 bytes and to store the result in a 16 bytes var. How can i do this? section .data big_num1 dd 0x11111111, 0x22222222, 0x33333333 big_num2 dd 0xffffffff, 0x22222222, 0x33333333 section .bss result_4word resd 4 I think i can add the first 4 bytes number from number 1 with the other first 4 bytes from number 2 and so on.. but i don't know how to concatenate results in in my result variable. How should i do the carry,if it's needed? Is this solution the

问题 I want to add two numbers that have 12 bytes and to store the result in a 16 bytes var. How can i do this? section .data big_num1 dd 0x11111111, 0x22222222, 0x33333333 big_num2 dd 0xffffffff, 0x22222222, 0x33333333 section .bss result_4word resd 4 I think i can add the first 4 bytes number from number 1 with the other first 4 bytes from number 2 and so on.. but i don't know how to concatenate results in in my result variable. How should i do the carry,if it's needed? Is this solution the

问题 when I have the the operation IDIV ecx in assembly, then i have read that the that the value in edx:eax is divided by the operand ecx. I also know that the quotient is stored in eax and the remainder in edx. so but what exactly is the value in edx:eax ?? Can someone explain it to me? edit: i also did not understand the reason of "cdq" operation which come always before the IDIV operation although I have read some pages about that. 回答1: i have read that the that the value in edx:eax is divided

问题 This question already has an answer here : Binary Bomb Phase 5 - lookup table translation -> string compare (1 answer) Closed 20 days ago . Can somebody please explain to me what exactly these functions do? I have a breakpoint set at<+35> as indicated by the arrow, and this is where I get lost. So far, all I've figured out was that this phase takes a string with a length of 6. But I don't exactly know what is going on in the movsbl and movzbl functions. I'm not expecting an answer, but some