x86

Identifying faulting address on General Protection Fault (x86)

人盡茶涼 提交于 2021-02-07 13:13:00
问题 I am trying to write a ISR for the General Protection Fault (GP#13) on x86. I am unable to figure out from the INTEL docs as to how I can find out the faulting address causing the exception. I know that for Page fault exceptions (GP#14) the cr2 register holds the faulting address. Any help is appreciated. 回答1: All references I make here are from AMD64 Architecture Programmer's Manual Volume 2: System Programming, which also describes the legacy protected-mode (i.e., x86) behavior. Figure 8-8

Is virtual memory used when using Port-mapped I/O?

谁都会走 提交于 2021-02-07 12:56:25
问题 If I have a Memory-mapped I/O device, and I want to write to a register for this device located at address 0x16D34 , the 0x16D34 address is actually a virtual address, and the CPU will translate it to a physical address first, and then write the data to the physical address. But what about Port-mapped I/O devices (for example: a serial port), so if I want to write to a register for a serial port located at address 0x3F8 , is the 0x3F8 address a physical address or a virtual address? Edit: I

How to make premultiplied alpha function faster using SIMD instructions?

↘锁芯ラ 提交于 2021-02-07 06:38:12
问题 I'm looking for some SSE/AVX advice to optimize a routine that premultiplies RGB channel with its alpha channel: RGB * alpha / 255 (+ we keep the original alpha channel). for (int i = 0, max = width * height * 4; i < max; i+=4) { data[i] = static_cast<uint16_t>(data[i] * data[i+3]) / 255; data[i+1] = static_cast<uint16_t>(data[i+1] * data[i+3]) / 255; data[i+2] = static_cast<uint16_t>(data[i+2] * data[i+3]) / 255; } You will find below my current implementation but I think it could be much

How does the linker find the main function?

空扰寡人 提交于 2021-02-07 06:25:06
问题 How does the linker find the main function in an x86-64 ELF-format executable? 回答1: A very generic overview, the linker assigns the address to the block of code identified by the symbol main . As it does for all the symbols in your object files. Actually, it doesn't assign a real address but assigns an address relative to some base which will get translated to a real address by the loader when the program is executed. The actual entry point is not likely main but some symbol in the crt that

Atomic Minimum on x86 using OpenMP

允我心安 提交于 2021-02-07 06:15:49
问题 Does OpenMP support an atomic minimum for C++11? If OpenMP has no portable method: Is there some way of doing it using a x86 or amd64 feature? In the OpenMP specifications I found nothing for C++ but the Fortran version seems to support it. See 2.8.5 of the v3.1 for the details. For C++ it states binop is one of +, *, -, /, &, ^, |, <<, or >>. but for Fortran it states intrinsic_procedure_name is one of MAX, MIN, IAND, IOR, or IEOR. In case you are interested in more context: I am looking for

Atomic Minimum on x86 using OpenMP

情到浓时终转凉″ 提交于 2021-02-07 06:14:51
问题 Does OpenMP support an atomic minimum for C++11? If OpenMP has no portable method: Is there some way of doing it using a x86 or amd64 feature? In the OpenMP specifications I found nothing for C++ but the Fortran version seems to support it. See 2.8.5 of the v3.1 for the details. For C++ it states binop is one of +, *, -, /, &, ^, |, <<, or >>. but for Fortran it states intrinsic_procedure_name is one of MAX, MIN, IAND, IOR, or IEOR. In case you are interested in more context: I am looking for

Atomic Minimum on x86 using OpenMP

荒凉一梦 提交于 2021-02-07 06:14:26
问题 Does OpenMP support an atomic minimum for C++11? If OpenMP has no portable method: Is there some way of doing it using a x86 or amd64 feature? In the OpenMP specifications I found nothing for C++ but the Fortran version seems to support it. See 2.8.5 of the v3.1 for the details. For C++ it states binop is one of +, *, -, /, &, ^, |, <<, or >>. but for Fortran it states intrinsic_procedure_name is one of MAX, MIN, IAND, IOR, or IEOR. In case you are interested in more context: I am looking for

Disabling AVX2 in CPU for testing purposes

*爱你&永不变心* 提交于 2021-02-07 05:40:42
问题 I've got an application that requires AVX2 to work correctly. A check was implemented to check during application start if CPU has AVX2 instruction. I would like to check if it works correctly, but i only have CPU that has AVX2. Is there a way to temporarly turn it off for testing purposes? Or to somehow emulate other CPU? 回答1: Yes, use an "emulation" (or dynamic recompilation) layer like Intel's Software Development Emulator (SDE), or maybe QEMU. SDE is closed-source freeware, and very handy

Assembly: REP MOVS mechanism

蹲街弑〆低调 提交于 2021-02-07 05:28:08
问题 Looking at the following assembly code: MOV ESI, DWORD PTR [EBP + C] MOV ECX, EDI MOV EAX, EAX SHR ECX, 2 LEA EDI, DWORD PTR[EBX + 18] REP MOVS DWORD PTR ES:[EDI], DWORD PTR [ESI] MOV ECX, EAX AND ECX, 3 REP MOVS BYTE PTR ES:[EDI], BYTE PTR[ESI] The book I got the code excerpt from explains the first REP MOVS as copying over 4-byte chunks, with the second REP MOVS copying the remaining 2-byte chunk, if it exists. How do the REP MOVS instructions operate? According to MSDN, "The instruction

PS/2 Mouse Not Firing

孤街浪徒 提交于 2021-02-07 04:36:32
问题 Everyone! I just finished writing my Keyboard Driver. Right now the problem is that my PS/2 MOUSE IRQ won't fire(IRQ 12). I tested this by this code: #include "irq.h" #define PIC_MASTER_CONTROL 0x20 #define PIC_MASTER_MASK 0x21 #define PIC_SLAVE_CONTROL 0xa0 #define PIC_SLAVE_MASK 0xa1 typedef void(*regs_func)(struct regs *r); /*Get all irq's*/ extern "C" void irq0(void); extern "C" void irq1(void); extern "C" void irq2(void); extern "C" void irq3(void); extern "C" void irq4(void); extern "C"