Intel-64 and ia32 atomic operations acquire-release semantics and GCC 5+
问题 I am investigating Intel CPU atomic features on my Haswell CPU (a 4/8 core 2.3-3.9ghz i7-4790M), and am finding it really hard to construct eg. reliable mutex_lock() and mutex_unlock() operations as suggested by for instance the GCC manual: 6.53 x86-Specific Memory Model Extensions for Transactional Memory The x86 architecture supports additional memory ordering flags to mark lock critical sections for hardware lock elision. These must be specified in addition to an existing memory model to