arm

问题 TL;DR: In a producer-consumer queue does it ever make sense to put an unnecessary (from C++ memory model viewpoint) memory fence, or unnecessarily strong memory order to have better latency at the expense of possibly worse throughput? C++ memory model is executed on the hardware by having some sort of memory fences for stronger memory orders and not having them on weaker memory orders. In particular, if producer does store(memory_order_release) , and consumer observes the stored value with

问题 TL;DR: In a producer-consumer queue does it ever make sense to put an unnecessary (from C++ memory model viewpoint) memory fence, or unnecessarily strong memory order to have better latency at the expense of possibly worse throughput? C++ memory model is executed on the hardware by having some sort of memory fences for stronger memory orders and not having them on weaker memory orders. In particular, if producer does store(memory_order_release) , and consumer observes the stored value with

问题 I have built a static library (*.a for gcc, *.lib for keil). One of its source file, compiled into library, contains definition of RADIO_IRQHandler. An excerpt from this source file, called "ral_irq_handlers.c", is below: ... void ral_symbol_import(void) //dummy function { return; } ... void RADIO_IRQHandler(void) { ... } ... This IRQ symbol definition should override the weak definition which is declared in startup file. The startup file is not compiled into any static library and is just a

问题 I read article about GCC Inline Assembler (http://www.ethernut.de/en/documents/arm-inline-asm.html). In this article, "memory" Clobber forces the compiler to store all cached values before and reload them after executing the assembler instructions. And it must retain the sequence. this is the example. The following code intends to multiply c with b, of which one or both may be modified by an interrupt routine. Disabling interrupts before accessing the variables and re-enable them afterwards

问题 Periodically, the program enters the HardFault_Handler. In the register HFSR set bit FORCED and in UFSR register set UNALIGNED . The project uses STM32F417, FreeRtos, LWIP. In most cases, the error in the stack are LWIP function. The error occurs rarely once a few days. The program is compiled with the flag --no_unaligned_access . It is unclear why there is such an error - while --no_unaligned_access flag is enabled and even every few days, and second whether it is possible to process or

问题 If I have a fast interrupt handler (by adding __attribute__((interrupt("FIQ"))) ), can I invoke other non-fast-interrupt function inside the handler? For example, void f() {//...} void g() {//...} void handler() __attribute__((interrupt("FIQ"))) { // ... f(); g(); // ... } I have a fast interrupt handler set up similarly as the example above and it's not working as intended. I used gdb to trace through the handler and I found that things are pushed to the stack during the f function call and

问题 I'm taking an x86 class right now, and we have an ARM assembly assignment, which is a copy of an x86 asssignment we did. Basically it reads in from a file, changes lowercase letters to uppercase, and keeps spaces. So it only writes capital letters (change the lowercase letters if they are lowercase), and copy the spaces, while getting rid of numbers and characters. We are using only hex characters 00h-7F (even though the lowest usable character we have is 0x20). I tried to convert my code

问题 I'm taking an x86 class right now, and we have an ARM assembly assignment, which is a copy of an x86 asssignment we did. Basically it reads in from a file, changes lowercase letters to uppercase, and keeps spaces. So it only writes capital letters (change the lowercase letters if they are lowercase), and copy the spaces, while getting rid of numbers and characters. We are using only hex characters 00h-7F (even though the lowest usable character we have is 0x20). I tried to convert my code

问题 I have installed Debian on qemu 64-bit ARM (followed this tutorial) uname -a Linux test 4.9.0-7-arm64 #1 SMP Debian 4.9.110-1 (2018-07-05) aarch64 GNU/Linux and I am trying to run 32 bit elf files on it, but some work some don't: bash: ./file_2: cannot execute binary file: Exec format error running file command on the file that runs, I get: file_1: ELF 32-bit LSB executable, ARM, EABI4 version 1 (SYSV), statically linked, not stripped and the one that does not run: file_2: ELF 32-bit LSB

问题 I have installed Debian on qemu 64-bit ARM (followed this tutorial) uname -a Linux test 4.9.0-7-arm64 #1 SMP Debian 4.9.110-1 (2018-07-05) aarch64 GNU/Linux and I am trying to run 32 bit elf files on it, but some work some don't: bash: ./file_2: cannot execute binary file: Exec format error running file command on the file that runs, I get: file_1: ELF 32-bit LSB executable, ARM, EABI4 version 1 (SYSV), statically linked, not stripped and the one that does not run: file_2: ELF 32-bit LSB