UART communication in Gem5 with ARM Bare-metal

感情迁移 提交于 2019-12-01 20:28:07

Working setups

This repository contains a highly automated working example. Features:

  • works on both QEMU and gem5
  • works on both arm and aarch64
  • newlib allows using the standard C library optionally
  • semihosting exemplified
  • works on both RealViewPBX and VExpress_GEM5_V1. You should prefer VExpress_GEM5_V1 as it is a more modern platform.
  • pristine toolchain built with crosstool-NG

Key implementation points are described below.

https://github.com/tukl-msd/gem5.bare-metal contains another working setup and is more minimal, but it has less features currently.

arm

There is nothing special for ARM, you just need to find out the UART address and entry point address, exactly as for QEMU.

The UART address can be found on the gem5 source code src/dev/arm/RealView.py:

class RealViewPBX(RealView):
    uart = Pl011(pio_addr=0x10009000, int_num=44)

class VExpress_GEM5_V1(RealView):
    uart0 = Pl011(pio_addr=0x1c090000, int_num=37)

The entry point is deduced from the ELF directly, but TODO some values are not valid. I just step debugged until I found these values:

    if common.machine == 'VExpress_GEM5_V1':
        entry_address = 0x80000000
    elif common.machine == 'RealViewPBX':
        entry_address = 0x10000

aarch64

Similar to arm, but requires a few extra steps.

First you must build your toolchain yourself if you want Newlib since Ubuntu does not have the aarch64 package. I've adapted the existing arm config and reached this working config.

Then, as of 6fa49382ef22e1b01fb24503e3bbe5ab3556750a you must pass the CLI options:

fs.py --param 'system.highest_el_is_64 = True' \
      --param 'system.auto_reset_addr = True'

(auto_reset_addr_64 before 6fa49382ef22e1b01fb24503e3bbe5ab3556750a) otherwise it fails with:

fatal: Kernel is mapped to invalid location (not memory). kernelStart 0x(400000) - kernelEnd 0x(0) 0x400000:0

The other key patch is: https://github.com/gem5/gem5/commit/3c3ca64b5f0dd9eef7b1ce1c65cc6e8e9147dd38

Alternatively, you could also patch fs.py as:

diff --git a/configs/example/fs.py b/configs/example/fs.py
index 3997ed76c..286e0bca6 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -376,5 +376,9 @@ if buildEnv['TARGET_ISA'] == "arm" and options.generate_dtb:
             sys = getattr(root, sysname)
             sys.dtb_filename = create_dtb_for_system(sys, '%s.dtb' % sysname)

+from m5.objects import ArmSemihosting
+test_sys.semihosting = ArmSemihosting()
+test_sys.highest_el_is_64 = True
+test_sys.auto_reset_addr_64 = True
 Simulation.setWorkCountOptions(test_sys, options)
 Simulation.run(options, root, test_sys, FutureClass)

The semihosting part is optional, but super convenient, see: How to enable ARM semihosting in gem5? The other options are mandatory.

Tested in Ubuntu 18.04 host.

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