Why we need lock prefix before CMPXCHG [duplicate]

Question

This question already has an answer here:

• Is x86 CMPXCHG atomic, if so why does it need LOCK? 3 answers

why do we need lock prefix before CMPXCHG in intel architecture. please see for reference http://courses.engr.illinois.edu/ece390/archive/spr2002/books/labmanual/inst-ref-cmpxchg.html

what i am not sure what are the consequences if don,t use lock. because between loading the value into eax and exceuting LOCK CMPXCHG the value could be changed irrespective of the lock prefix because loading value into eax and LOCK CMPXCHG are two instructions.

Mean to say if i dont use CMPXCHG the worst thing could happen is that i have to spin again.

Answer 1

• CMXCHG is truly atomic(asserts a bus lock) on a multiprocessor system only when it is prefixed with LOCK. These days snooping based cache coherence protocols are being used which eliminates the need for the fence(bus lock).
• Coming to second part of the question(the value would anyways be changed). YES in that case the CMPXCHG instruction fails but nevertheless is still atomic with respect to all the processors.

Bottom line: Lock prefix makes the CMPXCHG a multiprocessor barrier instruction.