make remove .cc after building .so without control

问题

Recently I encountered an extremly strange behavior of Makefile:

In current dir, I have hello.pyx:

#cython: language_level=3

print("Hello, world!")

and in .. I have Makefile:

includes=$(shell python3 -c "import sysconfig; print(sysconfig.get_path('include'))")
CFLAGS=-shared -pthread -fPIC -fwrapv -Oz -flto -Wall -fno-strict-aliasing -I$(includes)
LDFLAGS=-Wl,-plugin-opt=O2

%.cc: %.pyx
        cython --cplus $< -o $@

%.so: %.cc
        clang++ ${CFLAGS} ${LDFLAGS} $< -o $@

clean:
        rm -f *.cc *.so

.PHONY: clean

When I build hello.so in current dir using make -f ../Makefile hello.so, it deletes .cc after building .so:

cython --cplus hello.pyx -o hello.cc
clang++ -shared -pthread -fPIC -fwrapv -Oz -flto -Wall -fno-strict-aliasing -I/usr/include/python3.7m -Wl,-plugin-opt=O2 hello.cc -o hello.so
rm hello.cc

I tried remove target .PHONY and clean, but it doesn't help.

How can I stop make from rm hello.cc?

回答1:

That file is considered an intermediate file. All you have to do to keep it from being removed is mention it as a target or prerequisite anywhere in the makefile, like this:

sources: $(patsubst %.so,%.cc,$(MAKECMDGOALS))

来源：https://stackoverflow.com/questions/61262684/make-remove-cc-after-building-so-without-control