x86_64 Opcode encoding formats in the intel manual

試著忘記壹切 提交于 2021-02-16 14:04:29

问题


What are the "Op/En" formats listed in the Intel x86_64 reference manual? For example in the Add opcode I can take a guess at some such as "I" = Immediate, but is there a comprehensive list for these?


回答1:


The intro sections of Intel's vol.2 manual explain how to read each entry:

Section 3.1.1.4 Operand Encoding Column in the Instruction Summary Table

The “operand encoding” column is abbreviated as Op/En in the Instruction Summary table heading. Instruction operand encoding information is provided for each assembly instruction syntax using a letter to cross reference to a row entry in the operand encoding definition table that follows the instruction summary table. ...

NOTES

  • The letters in the Op/En column of an instruction apply ONLY to the encoding definition table immediately following the instruction summary table.

  • ...

So they're just keys to the table that goes with each instruction. And no, Intel doesn't seem to document what they stand for, but it's pretty straightforward.

(Related: How to determine if ModR/M is needed through Opcodes?)


Yes, the I stands for Immediate.

Explicit operands encoded with the ModRM byte are M or R for the r/m or reg fields.

V is the field encoded by VEX.vvvv or EVEX, giving such instructions a 3rd operand for non-destructive operations, or for 3-operand instructions like FMA.

vpblendvb xmm1, xmm2, xmm3/m128, xmm4 encodes the 4th operand with an immediate byte, and uses RVMR in to Op/En column. See also What kind of address instruction does the x86 cpu have? - I think that might be the only x86 instruction with 4 separate explicitly-encoded operands, outside of AVX512's 3 + mask register.

vextractf128 and the AVX512 versions of it use A through D for rows of the table because the only distinguishing feature is the "tuple type" for scaled short-displacements and masking. It would just be weird if they used MRI / MRI2 / MRI4 / etc.


(rep) movs uses ZO : all operands are implicit (DF, RSI, RDI, and the memory pointed-to by them), so probably that stands for Zero Operands. (At least none that need to be encoded).

cdq uses the same ZO so yeah it's probably "zero (explicit) operands"

x86 only has a few ways to specify explicit operands.



来源:https://stackoverflow.com/questions/57440527/x86-64-opcode-encoding-formats-in-the-intel-manual

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