问题
I have been playing with intel mpx and found that it adds certain instructions that I could not understand. For e.g. (in intel format):
movsxd rdx,edx
I found this, which talks about a similar instruction - MOVSX.
From that question, my interpretation of this instruction is that, it takes double byte (that's why there is a d in movsxd) and it copies it into rdx register (in two least significant bytes) and fills the rest with the sign of that double byte.
Is my interpretation correct (I think I'm wrong)? If not can you please tell me what is going on?
回答1:
Your code is 64-bit. If you look at the instruction set architecture (ISA) manual for MOVSXD, the 64-bit variant is defined as:
MOVSXD r64, r/m32 Move doubleword to quadword with sign-extension.
This is the instruction in 64-bit code that takes a 32-bit register or an address to a 32-bit value and moves it sign extended into a 64-bit register. Sign extension is taking the value of the top most bit (sign bit) of the source and using it to fill in all the upper bits of the destination.
movsxd rdx,edx takes a look at bit 31 (top most bit) of EDX and sets the upper 32 bits of the destination to that value and copies the lower 32 bits as is. If the sign bit is set in EDX the upper 32 bits of the 64-bit register will be set to 1. If the sign bit is clear the upper 32 bits of RDX will be 0.
As an example, assume EDX has the value 0x80000000. Bit 31 is 1. As a signed number that is -2147483648. If you do movsxd RDX, EDX the value in RDX will be 0xFFFFFFFF80000000 . As a signed 64-bit value that still represents -2147483648.
If EDX had been 0x7fffffff (signed value +2147483647) with bit 31 being 0, the value in RDX would have been 0x000000007fffffff which still represents the signed number +2147483647. As you can see sign extension preserves the sign bit across the upper bits of a wider register so that the signedness of the destination is preserved.
来源：https://stackoverflow.com/questions/56565510/x86-what-does-movsxd-rdx-edx-instruction-mean