Are two store buffer entries needed for split line/page stores on recent Intel?

问题

It is generally understood that one store buffer entry is allocated per store, and this store buffer entry holds the store data and physical address¹.

In the case that a store crosses a 4096-byte page boundary, two different translations may be needed, one for each page, and hence two different physical addresses may need to be stored. Does this mean that page-crossing stores take 2 store buffer entries? If so, does it apply also to line-crossing stores?

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¹ ... and perhaps some/all of the virtual address to help in store forwarding.

来源：https://stackoverflow.com/questions/61180829/are-two-store-buffer-entries-needed-for-split-line-page-stores-on-recent-intel