X86_64 - assembly - Why displacement not 64 bits?

问题

I am reading the Intel x86_64 guide vol.1 to refresh how memory addressing works.

Still,

3.7.5 Specifying an Offset

The offset part of a memory address can be specified directly as a static value (called a displacement) or through an address computation made up of one or more of the following components:

• Displacement — An 8-, 16-, or 32-bit value.

I read in Agner Fog's assembly guide that 64-bit absolute addressing was possible when used with (r/e)ax register.

So..

Is it possible, or not, to use absolute addressing with 64 bits addresses to jmp, mov and call (with all the registers), or will I have to keep using the Base + displacement combo?

回答1:

Only the move to and from accumulator has a 64 bit absolute address variant.
All other moves are limited to the 32 bit displacement methods.

回答2:

Note that mov absolute_addr64, %rax is only available with rax as the target.
mov $imm64, %reg is available for any register.
See Load from a 64-bit address into other register than rax.

When AMD designed the AMD64 architecture, they basically said 2GB of code should be enough for everyone.

http://www.x86-64.org/documentation/abi.pdf describes the small, medium, and large code models.

• small: normal 32bit relative displacements for every jump, call, and memory displacement. (All symbols are known to be located between 0 and 2^31 - 2^24 - 1).

• medium: small code, but the data section is split into two parts: regular and large (.ldata, lrodata, .lbss).

  This model requires the compiler to use movabs instructions to access large static data and to load addresses into registers, but keeps the advantages of the small code model for manipulation of addresses in the small data and text sections (specially needed for branches)

  By default only data larger than 65535 bytes will be placed in the large data section

• large:

  The compiler is required to use the movabs instruction, as in the medium code model, even for dealing with addresses inside the text section. Additionally, indirect branches are needed when branching to addresses whose offset from the current instruction pointer is unknown.

  It is possible to avoid the limitation on the text section in the small and medium models by breaking up the program into multiple shared libraries, so this model is strictly only required if the text of a single function becomes larger than what the medium model allows.

Medium PIC needs to movabs / lea / add to generate RIP-relative addresses with larger than 32bit displacements.

Large PIC needs that for addressing the global offset table and procedure linkage table, too.

回答3:

I don't think the x86 architectures have 64 bit displacements or offsets.

The reason is simple: the "ease" of programming these provide, doesn't occur often enough to matter. Statistically, most of the offsets you need are pretty small. When you need the 64 bit offset (very rarely) you can always simulated with an ADD instruction at virtually no performance penalty. The transistors to do 64 bit offsets, are better spent doing something else.

来源：https://stackoverflow.com/questions/31853189/x86-64-assembly-why-displacement-not-64-bits