Override size of a parameter that is an array of a struct in systemverilog

问题

i have a module parameter that is an array of a predefined struct. I set the default size of this array as 1 element. The idea is to override it with the appropriate size at the time of instantiation.

The way i show below doesn't override the size. It only overides the first value. I can see why it would do this as the size field is not parameterized. Is there a better way than to pass a parameter for the size?

Thank you for the help.

    module reg_slave
      #(parameter
         reg_pkg::defval_pair [0:0] REG_DEFVAL  = '0 //param decl with size=1
       )();
     endmodule : reg_slave

    module top();
      localparam reg_pkg::defval_pair [1:0] REG_DEFVAL = '{ 
         {3,'h32},
         {0,'h1}
         };  //param of same type and size = 2

      reg_slave #(
                   .REG_DEFVAL(REG_DEFVAL) //trying to override the size.
                 )  
      reg_slave_inst ();

    endmodule : top

    package reg_pkg;
      typedef struct packed { int ADDR; bit [31:0] VAL;} defval_pair;
    endpackage : reg_pkg

回答1:

Using type parameter. However, you still need an extra parameter to pass into the instance. The advantage is that you can change a parameter's type.

module reg_slave
  #(parameter
     type T = int,
     T REG_DEFVAL  = '0 //param decl with size=1
   )();
 endmodule : reg_slave

module top();
  localparam reg_pkg::defval_pair [1:0] REG_DEFVAL = '{ 
     {3,'h32},
     {0,'h1}
     };  //param of same type and size = 2

  reg_slave #(
               .T(reg_pkg::defval_pair[1:0]),
               .REG_DEFVAL(REG_DEFVAL) //trying to override the size.
             )  
  reg_slave_inst ();

endmodule : top

回答2:

You need an additional parameter for the size:

module reg_slave
      #(parameter
      int SIZE=1,
     reg_pkg::defval_pair [SIZE-1:0] REG_DEFVAL  = '0 //param decl with size=1
   )();
endmodule : reg_slave

You have a few errors in assigning REG_DEFVAL in top. REG_DEFVAL is a packed array, therefore remove the single quite. defval_pair is a packed struct, therefore the entries need a cast assignment:

module top();
  localparam int SIZE=2;
  localparam reg_pkg::defval_pair [SIZE-1:0] REG_DEFVAL = { // no single quite
     reg_pkg::defval_pair'{3,'h32}, // cast as defval_pair
     reg_pkg::defval_pair'{0,'h1} // cast as defval_pair
     };  //param of same type and size = 2

  reg_slave #( .SIZE(SIZE), // override size
               .REG_DEFVAL(REG_DEFVAL)
             )  
  reg_slave_inst ();

endmodule : top

UPDATE: Passing a N size array parameter without passing a SIZE parameter.

Note: this is most likely not synthesisable. SystemVeilog support for this feature may vary between simulators.

module reg_slave
      #(parameter
     reg_pkg::defval_pair REG_DEFVAL [] = '{ reg_pkg::defval_pair'{0,'h0} } //param decl with size=1
   )();
endmodule : reg_slave

module top();
  localparam reg_pkg::defval_pair REG_DEFVAL [] = '{ // with single quite
     reg_pkg::defval_pair'{3,'h32}, // cast as defval_pair
     reg_pkg::defval_pair'{0,'h1} // cast as defval_pair
     };  //param of same type and size = 2

  reg_slave #(
               .REG_DEFVAL(REG_DEFVAL)
             )  
  reg_slave_inst ();

endmodule : top

来源：https://stackoverflow.com/questions/18627235/override-size-of-a-parameter-that-is-an-array-of-a-struct-in-systemverilog

标签

arrays

verilog

system-verilog

hdl