Change RELTOL to 0.01% (Relative Error Tolerance)
Change METHOD to “trapezodial” (Integration method)
Change ITL4 to 100 (Upper transient iteration limit)
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For a complex circuit, try simulating portions at a time until you identify the problem area. Sometimes a particular part model will be the problem.
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In the Analysis Options, change the simulation mode from Trapezoidal to Gear.
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In the Analysis Options, reduce the values of all the tolerance limits by a factor of ten or so. This will reduce the simulation accuracy somewhat but may allow the circuit to converge.
来源:CSDN
作者:Huskar_Liu
链接:https://blog.csdn.net/weixin_42418557/article/details/103507188