linux compile for enable uart2

问题

I am using openwrt, initially, under /dev, there is only ttyO0 with is serial port for console. and I am using it to connect the board(siamilar to beaglebone black).

Now, I am wire a gps to uart2. but I think somehow the openwrt is not enable it by default.

I checked the device tree, am335x-bone.dts(I am using bone for my board, cause my board is not BBB). I not too much setting in it. most of config is from am33xx.dtst and am335x-bone-common.dtsi.

I check the am33xx dtsi, there are some code like this under the ocp{}

    uart0: serial@44e09000 {
        compatible = "ti,omap3-uart";
        ti,hwmods = "uart1";
        clock-frequency = <48000000>;
        reg = <0x44e09000 0x2000>;
        interrupts = <72>;
        status = "disabled";
    };

    uart1: serial@48022000 {
        compatible = "ti,omap3-uart";
        ti,hwmods = "uart2";
        clock-frequency = <48000000>;
        reg = <0x48022000 0x2000>;
        interrupts = <73>;
        status = "disabled";
    };

    uart2: serial@48024000 {
        compatible = "ti,omap3-uart";
        ti,hwmods = "uart3";
        clock-frequency = <48000000>;
        reg = <0x48024000 0x2000>;
        interrupts = <74>;
        status = "disabled";
    };

    uart3: serial@481a6000 {
        compatible = "ti,omap3-uart";
        ti,hwmods = "uart4";
        clock-frequency = <48000000>;
        reg = <0x481a6000 0x2000>;
        interrupts = <44>;
        status = "disabled";
    };

    uart4: serial@481a8000 {
        compatible = "ti,omap3-uart";
        ti,hwmods = "uart5";
        clock-frequency = <48000000>;
        reg = <0x481a8000 0x2000>;
        interrupts = <45>;
        status = "disabled";
    };

    uart5: serial@481aa000 {
        compatible = "ti,omap3-uart";
        ti,hwmods = "uart6";
        clock-frequency = <48000000>;
        reg = <0x481aa000 0x2000>;
        interrupts = <46>;
        status = "disabled";
    };

I did change uart2 from disabled status to "okay" and also change code in am335x-bone-common.dtsi undert &am33xx_pinmux{}

uart0_pins: pinmux_uart0_pins {
    pinctrl-single,pins = <
        0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
        0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
    >;
};

uart2_pins: pinmux_uart2_pins {
    pinctrl-single,pins = <
        0x150 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
        0x154 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
    >;
};

uart0 part is default there, I add code for uart2 part below it.

and in am335x-bone.dts, I add this code to enable uart2

  &uart2 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart0_pins>;

    status = "okay";
};

after compile this, I can see the /dev/ttyO2 shows up in openwrt. but when I use script write to this port and then read from it. nothing shows up.

this is my script I use lua since it's build-in

local clock = os.clock

function wait(n)  -- seconds
  local t0 = clock()
  while clock() - t0 <= n do end
end


while true do
  print("Writing")
  wuar0 = io.open("/dev/ttyO0","w")
  wuar1 = io.open("/dev/ttyO1","w")
  wuar2 = io.open("/dev/ttyO2","w")
  wuar0:write("This is uart0 \n")
  wuar1:write("This is uart1 \n")
  wuar2:write("This is uart2 \n")
  wuar0:flush()
  wuar1:flush()
  wuar2:flush()
  wuar0 = io.close()
  wuar1 = io.close()
  wuar2 = io.close()
  wait(2)

  print("Reading")
  ruar0 = io.open("/dev/ttyO0","r")
  ruar1 = io.open("/dev/ttyO1","r")
  ruar2 = io.open("/dev/ttyO2","r")
  print(ruar0:read())
  print(ruar1:read())
  print(ruar2:read())
  ruar0:flush()
  ruar1:flush()
  ruar2:flush()
  ruar0 = io.close()
  ruar1 = io.close()
  ruar2 = io.close()
  wait(2)
end

Did I do it right? if not, what I need to do to enable the uart2.

I did a lot research, but most of them are out of update. not work in my case.

or if anyone could tell me what is the step to enable this or how I can check if it is enable or not.

any information would help a lot. Thanks.

来源：https://stackoverflow.com/questions/39780105/linux-compile-for-enable-uart2