How many register and what kind of register are available for the storage class REGISTER in c language

为君一笑 提交于 2019-12-07 15:17:29

But I couldn't find any of such specification of how many registers does the cpu contain

Just look for "ia32 programming model" or "amd64 programming model".

I couldn't figure out how many of these are used by c storage classes.

That is implementation dependent. A compiler can even ignore that. Some of them use automatic register mapping if invoked with a high level of optimization, regardless of the way the variable has been declared.

For example: the programming model for user-mode applications on IA32 is composed of the registers EAX, EBX, ECX, EDX, ESI, EDI, EBP, ESP and EIP. EAX and EDX are used as accumulators, they are implicit operands for some instructions (MUL, DIV) and they hold the return value of a function. EBP and ESP are reserved for stack and frame management. EIP is the instruction pointer. So this leaves us with EBX, ECX, EDI and ESI for register mapping. Depending upon the code generated, one or more of these registers may be needed, so reducing even more the number of available registers for mapping variables.

The register keyword in C was included because when C was created, compilers did not always do a good job of register allocation. Register allocation is the the part of the compiler which maps program variables to CPU registers.

Nowadays, the algorithms compilers use for register allocation are on the whole excellent. So much so that compilers often ignore the register keyword, reasoning that the compiler knows better then the programmer on how to map registers to maximize performance.

I'm not sure what compiler 'mcleod_ideafix' is referring to when he writes that EAX and EDX are not available for register allocation. The gcc compiler uses 6 integer registers in 32 bit x86 code (EAX, EBX, ECX, EDX, ESI, and EDI). It will even use EBP if the function does not make any function calls and you give the proper compiler option. 64 bit mode adds 8 more registers R8 through R15. If you are using gcc just compile your file with the -S option then look at the generated code to see what registers are used.

Another thing to consider is that Intel processors use a feature called register renaming to reduce the performance penalty of having not enough registers.

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