Assembly PC Relative Addressing Mode

拈花ヽ惹草 提交于 2019-12-04 13:50:08

Shifting left by n bits is the same thing as multiplying the number by 2n. Shifting left 2 bits multplies by 4.

If your branch offset is shifted left by 2, that means your branch offset operand is in whole instruction units, not bytes. So a branch instruction with an 8 operand means, jump 8 instructions, which is 32 bytes.

MIPS multiplies by 4 because instructions are always 32 bits. 32 bits is 4 bytes.

MIPS Instructions are guaranteed to begin at an address which is evenly divisible by 4. This means that the low two bits of the PC is guaranteed to be always zeros, so all branch offsets are guaranteed to have 00 in the low two bits. For this reason, there's no point storing the low two bits in a branch instruction. The MIPS designers were trying to maximize the range that branch instructions can reach.

PC means "Program Counter". The program counter is the address of the current instruction. PC+4 refers to the address 4 bytes past the current instruction.

Branch Offset

MIPS branch offsets, like most processors, are relative to the address of the instruction after the branch. A branch with an immediate operand of zero is a no-op, it branches to the instruction after the branch. A branch with a sign extended immediate operand of -1 branches back to the branch.

The branch target is at ((branch instruction address) + 4 + ((sign extended branch immediate operand) << 2)).

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