compiler errors when compiling *.vhdl into a library - Altera Quartus II

Question

I've downloaded the floating point package from http://www.vhdl.org/fphdl/ and did the following:

1. I included the math_utility_pkg.vhd, fixed_pkg_c.vhd and float_pkg_c.vhd files in my project
2. I assigned them to a library (following the instructions in Compiling *.vhdl into a library, using Altera Quartus II)
3. tried to compile them, first by setting my project's top entity as top entity and the second time by setting float_pkg_c.vhd as top entity

I'v encountered several issues:

1. I'm not sure whether to use the ieee_proposed library name or floatfixlib, as the former is suggested in the documentation and the latter is used from within the package files
2. When compiling, I keep getting errors from within the package files (e.g. "failed to elaborate call to subprogram "remainder"" and similar)
3. There seem to be some dispute between the facts that the package file has the suffix _c, but it should be included without it (e.g. use FLOATFIXLIB.float_pkg.all;), I can't get to that error at this moment though
4. finally, when the float_pkg_c.vhd is set as top entity, the compiler generates this error: "Top-level design entity "float_pkg_c" is undefined"

I keep trying variations of the above attempts, but get no progress at all.

Answer 1

You may wish to re-download the packages. I don't see a math_utility_pkg and I don't see library floatfixlib referenced in the packages. You must have a very old release.

I just re-downloaded the Altera distribution. In it, I see the packages referenced in the post you cross listed: fixed_float_types_c.vhdl, fixed_pkg_c.vhdl, and float_pkg_c.vhdl. I also note that the file date stamps in the zip file are: 8/27/2009.

Answer 2

I looked at: pastebin.com/TUtGax7M

It looks like the packages compile and you are trying to compile your design and it is failing on a call to "to_float". Without seeing the code, I can only guess. The call to to_float needs to determine the range of the result either by passing it the object (first assignment below) or the indices of the result (second assignment below).

signal A_fp32 : float32 ;
. . .

-- Real and/or Integer Literal
A_fp32 <= to_float(6.5, A_fp32); -- size using A_fp32
A_fp32 <= to_float(6.5, 8, -32); -- pass indicies

I also see the call to divide failing. Note that divide is on the bleeding edge of synthesis. Vendors may or may not support divide. Short story is you will probably need to submit a bug report against the divide and instead use their macro/wizard. Note if they support a macro/wizard for divide, then they can do synthesis, it is just to their advantage to keep you using their vendor specific code as much as possible.