I have a ARM NEON Cortex-A8 based processor target. I was optimizing my code by making use of NEON. But when I compile my code I get this strange error. Don't know how to fix this.
I'm trying to compile the following code (PART 1) using Code Sourcery (PART2) on my host. And I get this strange error (PART3). Am I doing something wrong here? Can anyone else compile this and see if they also get the same compilation error?
The strange part is, in the code if I comment out the else if(step_size == 4) part of the code, then the error vanishes. But, sadly my optimization is not complete with out it, so I must have it.
At first I thought its the problem with CodeSourcey compiler (on my host), so I compiled the program on my target directly (My target runs on Ubuntu). I used gcc there and once again, I get the same error and when I comment out the else if(step_size == 4) part, then the error vanishes.
Help!
PART 1
#include<stdio.h>
#include"arm_neon.h"
#define IMAGE_HEIGHT 480
#define IMAGE_WIDTH 640
float32_t integral_image[IMAGE_HEIGHT][IMAGE_WIDTH];
float32x4_t box_area_compute3(int, int , int , int , unsigned int , float);
inline int min(int, int);
int main()
{
box_area_compute3(1, 1, 4, 4, 2, 0);
return 0;
}
float32x4_t box_area_compute3(int row, int col, int num_rows, int num_cols, unsigned int step_size, float three)
{
unsigned int height = IMAGE_HEIGHT;
unsigned int width = IMAGE_WIDTH;
int temp_row = row + num_rows;
int temp_col = col + num_cols;
int r1 = (min(row, height))- 1 ;
int r2 = (min(temp_row, height)) - 1;
int c1 = (min(col, width)) - 1;
int c2 = (min(temp_col, width)) - 1;
float32x4_t v128_areas;
if(step_size == 2)
{
float32x4x2_t top_left, top_right, bottom_left, bottom_right;
top_left = vld2q_f32((float32_t *)integral_image[r1] + c1);
top_right = vld2q_f32((float32_t *)integral_image[r1] + c2);
bottom_left = vld2q_f32((float32_t *)integral_image[r2] + c1);
bottom_right = vld2q_f32((float32_t *)integral_image[r2] + c2);
v128_areas = vsubq_f32(vsubq_f32(vaddq_f32(top_left.val[0], bottom_right.val[0]), top_right.val[0]), bottom_left.val[0]);
}
else if(step_size == 4)
{
float32x4x4_t top_left, top_right, bottom_left, bottom_right;
top_left = vld4q_f32((float32_t *)integral_image[r1] + c1);
top_right = vld4q_f32((float32_t *)integral_image[r1] + c2);
bottom_left = vld4q_f32((float32_t *)integral_image[r2] + c1);
bottom_right = vld4q_f32((float32_t *)integral_image[r2] + c2);
v128_areas = vsubq_f32(vsubq_f32(vaddq_f32(top_left.val[0], bottom_right.val[0]), top_right.val[0]), bottom_left.val[0]);
}
if(three == 3.0)
v128_areas = vmulq_n_f32(v128_areas, three);
return v128_areas;
}
inline int min(int X, int Y)
{
return (X < Y ? X : Y);
}
PART 2
arm-none-linux-gnueabi-gcc -O0 -g3 -Wall -c -fmessage-length=0 -fcommon -MMD -MP -MF"main.d" -MT"main.d" -mcpu=cortex-a8 -marm -mfloat-abi=hard -mfpu=neon-vfpv4 -o"main.o" "../main.c"
PART 3
../main.c: In function 'box_area_compute3':
../main.c:65: error: unable to find a register to spill in class 'GENERAL_REGS'
../main.c:65: error: this is the insn:
(insn 226 225 227 5 c:\program files\codesourcery\sourcery g++\bin\../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/arm_neon.h:9863 (parallel [
(set (reg:XI 148 [ D.17028 ])
(unspec:XI [
(mem:XI (reg:SI 3 r3 [301]) [0 S64 A64])
(reg:XI 148 [ D.17028 ])
(unspec:V4SF [
(const_int 0 [0x0])
] 191)
] 111))
(set (reg:SI 3 r3 [301])
(plus:SI (reg:SI 3 r3 [301])
(const_int 32 [0x20])))
]) 1605 {neon_vld4qav4sf} (nil))
../main.c:65: confused by earlier errors, bailing out
cs-make: *** [main.o] Error 1
I can't test this because I don't have the toolchain for it, but this type of error can often be worked around by rewording the code a little bit. Generally this shouldn't happen, and it should be reported as a bug, but you are using processor specific functionality, which is probably less well tested and polished than the rest of the compiler.
Since it is a register spill error and you've got several pointers involved I highly suspect that the compiler may be trying to load more data into registers than it needs to out of fear that there may be some aliasing going on (which probably isn't actually happening). Below I will deal with the possibility of that as well as do a few other things which may lessen the complexity of the code from the compiler's perspective (though it might not look like this is the case).
#include<stdio.h>
#include"arm_neon.h"
#define IMAGE_HEIGHT 480
#define IMAGE_WIDTH 640
float32_t integral_image[IMAGE_HEIGHT][IMAGE_WIDTH];
float32x4_t box_area_compute3(int, int , int , int , unsigned int , float);
inline int min(int, int);
int main()
{
box_area_compute3(1, 1, 4, 4, 2, 0);
return 0;
}
/* By putting these in separate functions the compiler will initially
* think about them by themselves, without the complications of the
* surrounding code. This may give it the abiltiy to optimise the
* code somewhat before trying to inline it.
* This may also serve to make it more obvious to the compiler that
* the local variables are dead after their use (since they are
* dead after the call returns, and that the lifetimes of some variable
* cannot actually overlap (hopefully reducing the register needs).
*/
static inline float32x4_t do_it2(float32_t *tl, float32_t *tr, float32_t *bl, float32_t * br) {
float32x4x2_t top_left, top_right, bottom_left, bottom_right;
float32x4_t A, B;
top_left = vld2q_f32(tl);
top_right = vld2q_f32(tr);
bottom_left = vld2q_f32(bl);
bottom_right = vld2q_f32(br);
/* By spreading this across several statements I have created several
* additional sequence points. The compiler does not think that it
* has to dereference all of the pointers before doing any of the
* computations.... maybe. */
A = vaddq_f32(*top_left.val, *bottom_right.val);
B = vsubq_f32(A, *top_right.val);
return vsubq_f32(B, *bottom_left);
}
static inline float32x4_t do_it4(float32_t *tl, float32_t *tr, float32_t *bl, float32_t * br) {
float32x4x4_t top_left, top_right, bottom_left, bottom_right;
float32x4_t A, B;
top_left = vld4q_f32(tl);
top_right = vld4q_f32(tr);
bottom_left = vld4q_f32(bl);
bottom_right = vld4q_f32(br);
A = vaddq_f32(*top_left.val, *bottom_right.val);
B = vsubq_f32(A, *top_right.val);
return vsubq_f32(B, *bottom_left);
}
float32x4_t box_area_compute3(int row, int col, int num_rows, int num_cols, unsigned int step_size, float three)
{
unsigned int height = IMAGE_HEIGHT;
unsigned int width = IMAGE_WIDTH;
int temp_row = row + num_rows;
int temp_col = col + num_cols;
int r1 = (min(row, height))- 1 ;
int r2 = (min(temp_row, height)) - 1;
int c1 = (min(col, width)) - 1;
int c2 = (min(temp_col, width)) - 1;
float32x4_t v128_areas;
float32_t *tl = (float32_t *)integral_image[r1] + c1;
float32_t *tr = (float32_t *)integral_image[r1] + c2;
float32_t *bl = (float32_t *)integral_image[r2] + c1;
float32_t *br = (float32_t *)integral_image[r2] + c2;
switch (step_size) {
case 2:
v128_areas = do_it2(tl, tr, bl, br);
break;
case 4:
v128_areas = do_it4(tl, tr, bl, br);
break;
}
if(three == 3.0)
v128_areas = vmulq_n_f32(v128_areas, three);
return v128_areas;
}
inline int min(int X, int Y)
{
return (X < Y ? X : Y);
}
I hope that this helps and that I did not introduce any errors.
Well I had contacted the Code Sourcery about this problem and they have considered this as a bug in GCC compiler. So I wrote the do_it4(){.....} function in assembly instead of using teh intrinsics. Now it works good!
The line:
float32x4x4_t top_left, top_right, bottom_left, bottom_right;
uses all 16 q registers! It's not too surprising that the compiler can't handle this. You probably could have fixed this by re-writing to use fewer registers.
ARM NEON Cortex-A8 have vfpv3 support, Cortex-A5 have vfpv4 and neon2 support, (as for: if you use -mfloat-abi=hard you skip ability to emulate in software missing instructions, so you cannot generate code which would be optimised for vfpv4 but would run on vfpv3 with software emulation)
来源：https://stackoverflow.com/questions/3811148/unknown-gcc-error-while-compiling-for-arm-neon-critical