smp

What happens if two process in different processors try to acquire the lock at EXACTLY same time

戏子无情 提交于 2019-11-28 18:55:20
Ok, so I am reading about synchronization, and I read through various algorithms such as spinlocks, semaphores, and mutex to avoid race condition. However, these algorithms can't prevent race condition in SMP when multiple proceses access the data exactly at the same time. For example, suppose thread 1 in processor A runs lock(mutex1); withdraw(1000); unlock(mutex1); and thread 2 in processor B runs lock(mutex1); deposit(1000); deposit(1000); unlock(mutex1); When both threads run EXACTLY AT THE SAME TIME, both threads will be in critical section simultaneously. The only solution (should be in

What is TLB shootdown?

我与影子孤独终老i 提交于 2019-11-28 16:35:43
问题 What is a TLB shootdown in SMPs? I am unable to find much information regarding this concept. Any good example would be very much appreciated. 回答1: A quick example: You have some memory shared by all of the processors in your system. One of your processors restricts access to a page of that shared memory. Now, all of the processors have to flush their TLBs, so that the ones that were allowed to access that page can't do so any more. The actions of one processor causing the TLBs to be flushed

How to use the APIC to create IPIs to wake the APs for SMP in x86 assembly?

守給你的承諾、 提交于 2019-11-27 18:26:38
问题 In a post-boot enviroment (no OS), how would one use the BSP (first core/processor) to create IPIs for the APs (all other cores/processors)? Essentially, how does one wake and set the instruction pointer for the other cores when starting from one? 回答1: WARNING: I've assumed 80x86 here. If it's not 80x86 then I don't know :-) First you need to find out how many other CPUs exist and what their APIC IDs are, and determine the physical address of the local APICs. To do this you parse ACPI tables

What happens if two process in different processors try to acquire the lock at EXACTLY same time

我们两清 提交于 2019-11-27 11:20:34
问题 Ok, so I am reading about synchronization, and I read through various algorithms such as spinlocks, semaphores, and mutex to avoid race condition. However, these algorithms can't prevent race condition in SMP when multiple proceses access the data exactly at the same time. For example, suppose thread 1 in processor A runs lock(mutex1); withdraw(1000); unlock(mutex1); and thread 2 in processor B runs lock(mutex1); deposit(1000); deposit(1000); unlock(mutex1); When both threads run EXACTLY AT

How can I get the CPU core number from within a user-space app (Linux, C)?

社会主义新天地 提交于 2019-11-27 08:39:23
Presumably there is a library or simple asm blob that can get me the number of the current CPU that I am executing on. Use sched_getcpu to determine the CPU on which the calling thread is running. See man getcpu (the system call) and man sched_getcpu (a library wrapper). However, note what it says: The information placed in cpu is only guaranteed to be current at the time of the call: unless the CPU affinity has been fixed using sched_setaffinity(2), the kernel might change the CPU at any time. (Normally this does not happen because the scheduler tries to minimize movements between CPUs to

Is there a simple process-based parallel map for python?

大兔子大兔子 提交于 2019-11-27 03:03:37
I'm looking for a simple process-based parallel map for python, that is, a function parmap(function,[data]) that would run function on each element of [data] on a different process (well, on a different core, but AFAIK, the only way to run stuff on different cores in python is to start multiple interpreters), and return a list of results. Does something like this exist? I would like something simple , so a simple module would be nice. Of course, if no such thing exists, I will settle for a big library :-/ Flávio Amieiro I seems like what you need is the map method in multiprocessing.Pool() :

How to set CPU affinity for a process from C or C++ in Linux?

馋奶兔 提交于 2019-11-26 18:51:55
Is there a programmatic method to set CPU affinity for a process in c/c++ for the Linux operating system. You need to use sched_setaffinity(2) . For example, to run on CPUs 0 and 2 only: #define _GNU_SOURCE #include <sched.h> cpu_set_t mask; CPU_ZERO(&mask); CPU_SET(0, &mask); CPU_SET(2, &mask); result = sched_setaffinity(0, sizeof(mask), &mask); ( 0 for the first parameter means the current process, supply a PID if it's some other process you want to control). See also sched_getcpu(3) . Use sched_setaffinity at the process level, or pthread_attr_setaffinity_np for individual threads. In short

Is there a simple process-based parallel map for python?

别来无恙 提交于 2019-11-26 10:24:56
问题 I\'m looking for a simple process-based parallel map for python, that is, a function parmap(function,[data]) that would run function on each element of [data] on a different process (well, on a different core, but AFAIK, the only way to run stuff on different cores in python is to start multiple interpreters), and return a list of results. Does something like this exist? I would like something simple , so a simple module would be nice. Of course, if no such thing exists, I will settle for a

How to set CPU affinity for a process from C or C++ in Linux?

▼魔方 西西 提交于 2019-11-26 06:01:24
问题 Is there a programmatic method to set CPU affinity for a process in c/c++ for the Linux operating system. 回答1: You need to use sched_setaffinity(2). For example, to run on CPUs 0 and 2 only: #define _GNU_SOURCE #include <sched.h> cpu_set_t mask; CPU_ZERO(&mask); CPU_SET(0, &mask); CPU_SET(2, &mask); result = sched_setaffinity(0, sizeof(mask), &mask); ( 0 for the first parameter means the current process, supply a PID if it's some other process you want to control). See also sched_getcpu(3).

What does multicore assembly language look like?

柔情痞子 提交于 2019-11-26 03:19:02
问题 Once upon a time, to write x86 assembler, for example, you would have instructions stating \"load the EDX register with the value 5\", \"increment the EDX\" register, etc. With modern CPUs that have 4 cores (or even more), at the machine code level does it just look like there are 4 separate CPUs (i.e. are there just 4 distinct \"EDX\" registers) ? If so, when you say \"increment the EDX register\", what determines which CPU\'s EDX register is incremented? Is there a \"CPU context\" or \