real-mode

Reset vector in 386+ processors

寵の児 提交于 2019-12-07 09:38:57
问题 The wikipedia page for Reset vector says (for 386+ processors): The value of the selector portion of the CS register at reset is F000h, the value of the base portion of the CS register is FFFF0000h, and the value of the IP register at reset is FFF0h to form the segmented address FFFFF000h:FFF0h in real mode. All my reading on computer boot up has said that the processor starts in real mode, and hence "selectors" should not come into picture. Then why the mention here ? Also, what is the "base

Understanding of boot loader assembly code and memory locations

ⅰ亾dé卋堺 提交于 2019-12-06 07:37:45
I want to check my understanding of the following bootloader code: BITS 16 start: mov ax, 07C0h ; Set up 4K stack space after this bootloader add ax, 288 ; (4096 + 512) / 16 bytes per paragraph mov ss, ax mov sp, 4096 mov ax, 07C0h ; Set data segment to where we're loaded mov ds, ax mov si, text_string ; Put string position into SI call print_string ; Call our string-printing routine jmp $ ; Jump here - infinite loop! text_string db 'This is my cool new OS!', 0 print_string: ; Routine: output string in SI to screen mov ah, 0Eh ; int 10h 'print char' function .repeat: lodsb ; Get character from

Simplest chainloading a boot manager

依然范特西╮ 提交于 2019-12-05 18:44:31
In order to boot from flash memory drive we load disks using the BIOS interrupt 13h in real mode with specifying the disk 0x80. Another disks should be accessed by 0x81, 0x82... as mentioned over this link I am trying to make my simple GRUB . My very first step is to boot from flash memory drive (Load MBR into 0x7C00 and print a message as a proof of correct boot) and read the my main HDD (which I assume it is numbered 0x81 and that the first 15 sectors are needed for booting) again into 0x7C00. I suppose that this naive idea should drop me into my main HDD's bootloader, but it is not as

Reset vector in 386+ processors

旧城冷巷雨未停 提交于 2019-12-05 17:41:18
The wikipedia page for Reset vector says (for 386+ processors): The value of the selector portion of the CS register at reset is F000h, the value of the base portion of the CS register is FFFF0000h, and the value of the IP register at reset is FFF0h to form the segmented address FFFFF000h:FFF0h in real mode. All my reading on computer boot up has said that the processor starts in real mode, and hence "selectors" should not come into picture. Then why the mention here ? Also, what is the "base portion" being referred to here, and in which register is it stored ? Basically, I don't understand

Running code on different processor (x86 assembly)

久未见 提交于 2019-12-04 18:20:47
问题 In real mode on x86, what instructions would need to be used to run the code on a different processor, in a multiprocessor system? (I'm writing some pre-boot code in assembler that needs to set certain CPU registers, and do this on every CPU in the system, before the actual operating system boots.) 回答1: So you have a stand-alone (you said "pre-boot") program, like a bootloader, running in real mode? And this is on a PeeCee with the usual BIOS? In that case you have only one CPU running. In

Running code on different processor (x86 assembly)

女生的网名这么多〃 提交于 2019-12-03 12:03:12
In real mode on x86, what instructions would need to be used to run the code on a different processor, in a multiprocessor system? (I'm writing some pre-boot code in assembler that needs to set certain CPU registers, and do this on every CPU in the system, before the actual operating system boots.) So you have a stand-alone (you said "pre-boot") program, like a bootloader, running in real mode? And this is on a PeeCee with the usual BIOS? In that case you have only one CPU running. In order to spin-up the other CPU units an operating system will typically execute what is called the universal

What does the colon : mean in x86 assembly GAS syntax as in %ds:(%bx)?

霸气de小男生 提交于 2019-12-01 22:32:18
问题 I am new to x86 assembly and I am trying to understand the code in this document : http://www.cs.cmu.edu/~410-s07/p4/p4-boot.pdf page 3 : movw $0x1234, %ax movw %ax, %ds movw $0x5678, %bx # The following instruction is the same as "movw $0x1337, (%bx)". movw $0x1337, %ds:(%bx) # Places 0x1337 into memory word 0x179b8. # Segment Base: %ds << 4: 12340 # Offset: %bx: + 5678 # ------- # Linear Address: 179b8 But I am not understanding the command : movw $0x1337, %ds:(%bx) # Places 0x1337 into

What does the colon : mean in x86 assembly GAS syntax as in %ds:(%bx)?

淺唱寂寞╮ 提交于 2019-12-01 20:48:41
I am new to x86 assembly and I am trying to understand the code in this document : http://www.cs.cmu.edu/~410-s07/p4/p4-boot.pdf page 3 : movw $0x1234, %ax movw %ax, %ds movw $0x5678, %bx # The following instruction is the same as "movw $0x1337, (%bx)". movw $0x1337, %ds:(%bx) # Places 0x1337 into memory word 0x179b8. # Segment Base: %ds << 4: 12340 # Offset: %bx: + 5678 # ------- # Linear Address: 179b8 But I am not understanding the command : movw $0x1337, %ds:(%bx) # Places 0x1337 into memory word 0x179b8. Why concatenating %ds with (%bx) is the same as ((%ds << 4) | %bx) ? As I am in real

accessing 4GB RAM in real mode

蓝咒 提交于 2019-12-01 10:54:37
Is it possible to using 4GB ram in real mode through enabling A20, without switching to protect mode, and without loosing BIOS interrupts? You can do this by using Unreal Mode. This mode loads one or more of the segment registers with a selector that has a limit of 4 GB. There are two forms of this mode, Big Unreal Mode and Huge Unreal Mode. The former allows accessing data above 1 MB, and the latter allows code and data above 1 MB. Huge Unreal Mode is difficult to set up, though, because real mode interrupts only preserve the low 16 bits of EIP . See this page for more information. You also

accessing 4GB RAM in real mode

狂风中的少年 提交于 2019-12-01 07:48:56
问题 Is it possible to using 4GB ram in real mode through enabling A20, without switching to protect mode, and without loosing BIOS interrupts? 回答1: You can do this by using Unreal Mode. This mode loads one or more of the segment registers with a selector that has a limit of 4 GB. There are two forms of this mode, Big Unreal Mode and Huge Unreal Mode. The former allows accessing data above 1 MB, and the latter allows code and data above 1 MB. Huge Unreal Mode is difficult to set up, though,