perf

问题 I am trying to get performance of individual functions within a process. How can I do it using perf tool? Is there any other tool for this? For example, let's say, main function calls functions A , B , C . I want to get performance of main function as well as functions A,B,C individually . Is there a good document for understating perf source code? Thank you. 回答1: What you want to do is user-land probing. Perf can only do part of it. Try sudo perf top -p [pid] and then watch the scoreboard.

问题 With perf (the Linux profiler), (v4.15.18), I can run perf stat $COMMAND to get some simple stats on the command. If I run perf record , it saves lots of data to a perf.data file. Can I run perf stat on the output of perf record ? So that I can look at the perf recorded data, but also get a simple overview? 回答1: perf stat uses hardware performance monitoring unit in counting mode, and perf record / perf report with perf.data file uses the same unit in overflow mode. In both modes hardware

问题 With perf (the Linux profiler), (v4.15.18), I can run perf stat $COMMAND to get some simple stats on the command. If I run perf record , it saves lots of data to a perf.data file. Can I run perf stat on the output of perf record ? So that I can look at the perf recorded data, but also get a simple overview? 回答1: perf stat uses hardware performance monitoring unit in counting mode, and perf record / perf report with perf.data file uses the same unit in overflow mode. In both modes hardware

问题 I want to obtain the percentage of memory read-write instructions in a test program, preferably dynamically. Apart from counting instructions in the gdb asm dump, which is static anyway, is there an easier way to obtain it? Valgrind provides total heap usage. Perf has some nice features but does not support WSL. Pin has an instruction count capability but it I am not sure if it supports WSL. 回答1: (Update: PIN reportedly doesn't work under WSL. But it doesn't require perf counters so it's

问题 I am studying about cache effect using a simple micro-benchmark. I think that if N is bigger than cache size, then cache have a miss operation every first reading cache line. In my machine, cache line size=64Byte, so I think totally cache occur N/8 miss operation and cache grind show that. However, perf tool displays different result. It only occur 34,265 cache miss operations. I am doubted about hardware prefetch, so turn off this function in BIOS. anyway, result is same. I really don't know

问题 I'm trying to understand the meaning of the perf events: dTLB-loads and dTLB-stores? 回答1: When virtual memory is enabled, the virtual address of every single memory access needs to be looked up in the TLB to obtain the corresponding physical address and determine access permissions and privileges (or raise an exception in case of an invalid mapping). The dTLB-loads and dTLB-stores events represent a TLB lookup for a data memory load or store access, respectively. The is the perf definition of

问题 I'm trying to understand the meaning of the perf events: dTLB-loads and dTLB-stores? 回答1: When virtual memory is enabled, the virtual address of every single memory access needs to be looked up in the TLB to obtain the corresponding physical address and determine access permissions and privileges (or raise an exception in case of an invalid mapping). The dTLB-loads and dTLB-stores events represent a TLB lookup for a data memory load or store access, respectively. The is the perf definition of

问题 I'm trying to come up with an example program which would have a high cache-miss rate. I thought I could try accessing a matrix column by column like so: #include <stdlib.h> int main(void) { int i, j, k; int w = 1000; int h = 1000; int **block = malloc(w * sizeof(int*)); for (i = 0; i < w; i++) { block[i] = malloc(h * sizeof(int)); } for (k = 0; k < 10; k++) { for (i = 0; i < w; i++) { for (j = 0; j < h; j++) { block[j][i] = 0; } } } return 0; } when I compile this with -O0 flag and run using

问题 I'm trying to come up with an example program which would have a high cache-miss rate. I thought I could try accessing a matrix column by column like so: #include <stdlib.h> int main(void) { int i, j, k; int w = 1000; int h = 1000; int **block = malloc(w * sizeof(int*)); for (i = 0; i < w; i++) { block[i] = malloc(h * sizeof(int)); } for (k = 0; k < 10; k++) { for (i = 0; i < w; i++) { for (j = 0; j < h; j++) { block[j][i] = 0; } } } return 0; } when I compile this with -O0 flag and run using

问题 I'm trying to come up with an example program which would have a high cache-miss rate. I thought I could try accessing a matrix column by column like so: #include <stdlib.h> int main(void) { int i, j, k; int w = 1000; int h = 1000; int **block = malloc(w * sizeof(int*)); for (i = 0; i < w; i++) { block[i] = malloc(h * sizeof(int)); } for (k = 0; k < 10; k++) { for (i = 0; i < w; i++) { for (j = 0; j < h; j++) { block[j][i] = 0; } } } return 0; } when I compile this with -O0 flag and run using