pci-bus

pci_rescan_bus() doesn't rescan PCI bus in Linux

岁酱吖の 提交于 2021-02-11 05:59:32
问题 I am trying to rescan PCI bus in my own kernel driver with the help of pci_rescan_bus() kernel function but I do not see it is functioning same. If I try to do same from user space by running following command, I see that rescanning happens: echo 1 > /sys/devices/pci0000:00/0000:00:14.1/rescan I am trying to re-initialize my ethernet ports which sit on PCI bus. Below is the code I am using for now: struct pci_dev *pci_eth_dev01, *pci_eth_dev02 = NULL; pci_eth_dev01 = pci_get_device(0x10ec,

How is PCI segment(domain) related to multiple Host Bridges(or Root Bridges)? [closed]

∥☆過路亽.° 提交于 2021-02-05 20:35:53
问题 Closed. This question does not meet Stack Overflow guidelines. It is not currently accepting answers. Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 4 months ago . Improve this question I'm trying to understand how PCI segment(domain) is related to multiple Host Bridges? Some people say multiple PCI domains corresponds to multiple Host Bridges, but some say it means multiple Root Bridges under a single Host Bridge. I'm confused and I don't find

How is PCI segment(domain) related to multiple Host Bridges(or Root Bridges)? [closed]

老子叫甜甜 提交于 2021-02-05 20:35:21
问题 Closed. This question does not meet Stack Overflow guidelines. It is not currently accepting answers. Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 4 months ago . Improve this question I'm trying to understand how PCI segment(domain) is related to multiple Host Bridges? Some people say multiple PCI domains corresponds to multiple Host Bridges, but some say it means multiple Root Bridges under a single Host Bridge. I'm confused and I don't find

Difference between memory bus and address bus

断了今生、忘了曾经 提交于 2020-02-20 07:08:22
问题 Can someone very briefly point out the differences between the memory bus and address bus in computer architectures ? Also when you say memory bus does it imply that you are referring to the databus ? 回答1: Beautifully explained here. In isolation, the microprocessor, the memory and the input/output ports are interesting components, but they cannot do anything useful. In combination, they can form a complete system if they can communicate with each other. This communication is accomplished

pci device info access in linux from userspace

谁说我不能喝 提交于 2019-12-24 03:38:07
问题 I want to access the pci device tree information from user space programatically. Like the root complex and the devices connected to it. How can I do it please let me know. Regards, Pradeep 回答1: libpci or pcilib (on which lspci is based) uses sysfs, procfs, and possibly other means to access PCI information. You can check pciutils package source code for further reference: https://github.com/gittup/pciutils https://github.com/gittup/pciutils/blob/gittup/lspci.c 回答2: From command line try to

How do cdev and its associated file operation work?

梦想与她 提交于 2019-12-23 02:39:27
问题 Actually working on a PCI driver. I have two PCIe cards with same device ID and vendor ID. So to make a difference, I assign these two cards with two different MINOR numbers. //request for device numbers error = alloc_chrdev_region(&devt, 0, cards_found, DEVICE_NAME); if (error == 0) { major = MAJOR(devt); printk(KERN_INFO "(drv_init): MAJOR number is %d\n", major); printk(KERN_INFO "(drv_init): MINOR number range from 0 to %d\n", cards_found-1); cdevs = cdev_alloc(); cdevs->owner = THIS

C++ app to talk to an FPGA over PCI in userland using mmap

丶灬走出姿态 提交于 2019-12-21 20:06:34
问题 First off i'm new to Linux programming so apologies if this makes no sense or I'm barking up the wrong tree, point me in the correct direction. I'm trying to write a cpp app to talk to a FPGA over a pci bus, in userland. The code I have written so far, enumerates over the directories in /sys/bus/pci/devices checking the device and vendor files to locate the correct one. Once I've found the device I know that the mapped regions I need to write to are somehow represented by resource[n] files,

Direct communication between two PCI devices

假如想象 提交于 2019-12-18 16:09:12
问题 I have a NIC card and a HDD both connected on PCIe slots in a Linux machine. Ideally, I'd like to funnel incoming packets to the HDD without involving the CPU, or involving it minimally. Is it possible to set up direct communication along the PCI bus like that? Does anyone have pointers as to what to read up on to get started on a project like this? Thanks all. 回答1: Not sure if you are asking about PCI or PCIe. You used both terms, and the answer is different for each. If you are talking

Finding available LPT (parallel) ports and addresses in Delphi

半腔热情 提交于 2019-12-10 16:19:32
问题 I am doing direct I/O on a parallel port which is fine and necessary for speed. I would like to enumerate the available ports to offer the user a choice of ports at setup time rather than a tedious trawl through device manager to read the address manually. Does anyone know a means of doing this please? Many thanks, Brian 回答1: According to this Microsoft article, for Win2K and newer, you can find details of parallel-connected devices in the registry at HKLM\SYSTEM\CurrentControlSet\Enum

Determine what (if any) PCI devices are plugged into motherboard PCI(e) slots

你离开我真会死。 提交于 2019-12-10 10:28:41
问题 I am writing a program in C# to perform a hardware audit across many Windows XP workstations. I need to determine which PCI devices are actual cards connected via a motherboard slot - NOT onboard devices that also use the PCI buses (built into the motherboard). I can successfully list all devices that use all the PCI buses using a variety of WMI classes, but none provide any indication of what is onboard vs. what is connected via a slot. I am not fussy about how the information is retrieved